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authorJoel Sherrill <joel.sherrill@OARcorp.com>2000-12-19 16:46:29 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2000-12-19 16:46:29 +0000
commit87e8f25ad70e6aae7f62e654d513085fce0e001e (patch)
treef0379c9234331f3db46f556a98d5437f7990e910
parent2000-12-19 Joel Sherrill <joel@OARcorp.com> (diff)
downloadrtems-87e8f25ad70e6aae7f62e654d513085fce0e001e.tar.bz2
2000-12-19 Joel Sherrill <joel@OARcorp.com>
* cpu_asm.S (_ISR_Handler): Return to the address in the EPC register. Previous code resulting in the interrupted immediately returning to the caller of the routine it was inside.
-rw-r--r--c/src/exec/score/cpu/mips/ChangeLog6
-rw-r--r--c/src/exec/score/cpu/mips/cpu_asm.S4
-rw-r--r--cpukit/score/cpu/mips/ChangeLog6
-rw-r--r--cpukit/score/cpu/mips/cpu_asm.S4
4 files changed, 18 insertions, 2 deletions
diff --git a/c/src/exec/score/cpu/mips/ChangeLog b/c/src/exec/score/cpu/mips/ChangeLog
index 8def49d0ce..86dfd0e121 100644
--- a/c/src/exec/score/cpu/mips/ChangeLog
+++ b/c/src/exec/score/cpu/mips/ChangeLog
@@ -1,5 +1,11 @@
2000-12-19 Joel Sherrill <joel@OARcorp.com>
+ * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register.
+ Previous code resulting in the interrupted immediately returning
+ to the caller of the routine it was inside.
+
+2000-12-19 Joel Sherrill <joel@OARcorp.com>
+
* cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here
because it has not been allocated yet.
diff --git a/c/src/exec/score/cpu/mips/cpu_asm.S b/c/src/exec/score/cpu/mips/cpu_asm.S
index 9509368dbd..45d152de95 100644
--- a/c/src/exec/score/cpu/mips/cpu_asm.S
+++ b/c/src/exec/score/cpu/mips/cpu_asm.S
@@ -909,9 +909,11 @@ _ISR_Handler_exit:
.set at
addiu sp,sp,EXCP_STACK_SIZE
+
+ mfc0 k0, C0_EPC
rfe /* Might not need to do RFE here... */
- j ra
+ j k0
nop
.set reorder
diff --git a/cpukit/score/cpu/mips/ChangeLog b/cpukit/score/cpu/mips/ChangeLog
index 8def49d0ce..86dfd0e121 100644
--- a/cpukit/score/cpu/mips/ChangeLog
+++ b/cpukit/score/cpu/mips/ChangeLog
@@ -1,5 +1,11 @@
2000-12-19 Joel Sherrill <joel@OARcorp.com>
+ * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register.
+ Previous code resulting in the interrupted immediately returning
+ to the caller of the routine it was inside.
+
+2000-12-19 Joel Sherrill <joel@OARcorp.com>
+
* cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here
because it has not been allocated yet.
diff --git a/cpukit/score/cpu/mips/cpu_asm.S b/cpukit/score/cpu/mips/cpu_asm.S
index 9509368dbd..45d152de95 100644
--- a/cpukit/score/cpu/mips/cpu_asm.S
+++ b/cpukit/score/cpu/mips/cpu_asm.S
@@ -909,9 +909,11 @@ _ISR_Handler_exit:
.set at
addiu sp,sp,EXCP_STACK_SIZE
+
+ mfc0 k0, C0_EPC
rfe /* Might not need to do RFE here... */
- j ra
+ j k0
nop
.set reorder