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authorSebastian Huber <sebastian.huber@embedded-brains.de>2016-07-12 10:02:40 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2016-07-12 10:13:01 +0200
commit814bd6e3baf1fe016268a3bf1c56b6ddad8e1eff (patch)
tree636024fb35715820f8d035c52a86d4e2cf5eac48
parent6f6cf78501d8d953983dfc68d5ec83f78856be92 (diff)
downloadrtems-814bd6e3baf1fe016268a3bf1c56b6ddad8e1eff.tar.bz2
bsps/powerpc: Fix AltiVec enable
There must be an isync after the mtmsr to ensure that the AltiVec is enabled for subsequent instructions.
-rw-r--r--c/src/lib/libbsp/powerpc/mvme5500/start/start.S1
-rw-r--r--c/src/lib/libbsp/powerpc/psim/start/start.S1
-rw-r--r--c/src/lib/libbsp/powerpc/shared/start/start.S1
3 files changed, 3 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/powerpc/mvme5500/start/start.S b/c/src/lib/libbsp/powerpc/mvme5500/start/start.S
index e46731c886..5990c7e2d4 100644
--- a/c/src/lib/libbsp/powerpc/mvme5500/start/start.S
+++ b/c/src/lib/libbsp/powerpc/mvme5500/start/start.S
@@ -68,6 +68,7 @@ __rtems_entry_point:
mfmsr r0
oris r0, r0, (1<<(31-16-6))
mtmsr r0
+ isync
/*
* set vscr and vrsave to known values
*/
diff --git a/c/src/lib/libbsp/powerpc/psim/start/start.S b/c/src/lib/libbsp/powerpc/psim/start/start.S
index 9163226387..918321af5f 100644
--- a/c/src/lib/libbsp/powerpc/psim/start/start.S
+++ b/c/src/lib/libbsp/powerpc/psim/start/start.S
@@ -103,6 +103,7 @@ _start:
mfmsr r0
oris r0, r0, (1<<(31-16-6))
mtmsr r0
+ isync
/*
* set vscr and vrsave to known values
*/
diff --git a/c/src/lib/libbsp/powerpc/shared/start/start.S b/c/src/lib/libbsp/powerpc/shared/start/start.S
index 0c68a8086f..729c89c40b 100644
--- a/c/src/lib/libbsp/powerpc/shared/start/start.S
+++ b/c/src/lib/libbsp/powerpc/shared/start/start.S
@@ -64,6 +64,7 @@ __rtems_entry_point:
mfmsr r0
oris r0, r0, (1<<(31-16-6))
mtmsr r0
+ isync
/*
* set vscr and vrsave to known values
*/