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authorSebastian Huber <sebastian.huber@embedded-brains.de>2018-12-21 06:27:16 (UTC)
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-12-21 06:56:35 (UTC)
commit750e79519a8061fecbf23ea7c96a7767b1099267 (patch)
treefd4692df3e22260fbad682f43946a30842d9461e
parent2158621366c19dc32418ace48f49f4474a40c669 (diff)
downloadrtems-750e79519a8061fecbf23ea7c96a7767b1099267.tar.bz2
bsps/i386: Enable instruction cache support
-rw-r--r--bsps/i386/shared/cache/cache.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/bsps/i386/shared/cache/cache.c b/bsps/i386/shared/cache/cache.c
index ecbabc4..f8358f2 100644
--- a/bsps/i386/shared/cache/cache.c
+++ b/bsps/i386/shared/cache/cache.c
@@ -8,7 +8,7 @@
#define I386_CACHE_ALIGNMENT 16
#define CPU_DATA_CACHE_ALIGNMENT I386_CACHE_ALIGNMENT
-#define CPU_INSTRUCTION_CACHE_ALIGNEMNT I386_CACHE_ALIGNMENT
+#define CPU_INSTRUCTION_CACHE_ALIGNMENT I386_CACHE_ALIGNMENT
void _CPU_disable_cache(void)
{