preliminary Raspberry Pi Model 2 support

This patch adds a BSP variant for the Raspberry Pi 2. You can
build both variants by configuring with the option
 --enable-rtemsbsp="raspberrypi2 raspberrypi"

For the current BSP, the only change was the peripheral register base
address and the compiler options.

The raspberrypi/make/custom rules were re-factored:
  raspberrypi.inc  -- Common rules
  raspberrypi.cfg  -- Raspberry Pi 1 specific rule/optons
  raspberrypi2.cfg -- Raspberry Pi 2 specific rule/options

I tested hello, ticker, unlimited, and paranoia on both the Pi (Model A+)
and Pi 2.

6 files changed, 55 insertions, 22 deletions

diff --git a/c/src/lib/libbsp/arm/raspberrypi/configure.ac b/c/src/lib/libbsp/arm/raspberrypi/configure.ac
index 42be4e9c9c..27abe6c09f 100644
--- a/c/src/lib/libbsp/arm/raspberrypi/configure.ac
+++ b/c/src/lib/libbsp/arm/raspberrypi/configure.ac
@@ -24,6 +24,14 @@ AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
 RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[])
 RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start])
 
+# Is this a Raspberry Pi 2?
+RTEMS_BSPOPTS_SET([BSP_IS_RPI2],[raspberrypi2],[1])
+RTEMS_BSPOPTS_SET([BSP_IS_RPI2],[*],[0])
+RTEMS_BSPOPTS_HELP([BSP_IS_RPI2],[Set if the BSP variant is Raspberry Pi 2.])
+AM_CONDITIONAL(RTEMS_RPI2,[test "$BSP_IS_RPI2" = "1"])
+
+
+
 RTEMS_BSP_CLEANUP_OPTIONS(0, 0)
 RTEMS_BSP_LINKCMDS
 
diff --git a/c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h b/c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h
index 4cc7eec81a..c33e22ab8e 100644
--- a/c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h
+++ b/c/src/lib/libbsp/arm/raspberrypi/include/raspberrypi.h
@@ -45,6 +45,20 @@
 /** @} */
 
 /**
+ * @name Peripheral Base Register Address
+ *
+ * @{
+ */
+
+#if (BSP_IS_RPI2 == 1)
+   #define RPI_PERIPHERAL_BASE      0x3F000000
+#else
+   #define RPI_PERIPHERAL_BASE      0x20000000
+#endif
+
+#define RPI_PERIPHERAL_SIZE         0x01000000
+
+/**
  * @name Internal ARM Timer Registers
  *
  * @{
@@ -52,7 +66,7 @@
 
 #define BCM2835_CLOCK_FREQ       250000000
 
-#define BCM2835_TIMER_BASE       (0x2000B400)
+#define BCM2835_TIMER_BASE       (RPI_PERIPHERAL_BASE + 0xB400)
 
 #define BCM2835_TIMER_LOD        (BCM2835_TIMER_BASE+0x00)
 #define BCM2835_TIMER_VAL        (BCM2835_TIMER_BASE+0x04)
@@ -74,7 +88,7 @@
  * @{
  */
 
-#define BCM2835_GPIO_REGS_BASE   (0x20200000)
+#define BCM2835_GPIO_REGS_BASE   (RPI_PERIPHERAL_BASE + 0x200000)
 
 #define BCM2835_GPIO_GPFSEL1     (BCM2835_GPIO_REGS_BASE+0x04)
 #define BCM2835_GPIO_GPSET0      (BCM2835_GPIO_REGS_BASE+0x1C)
@@ -90,7 +104,7 @@
  * @{
  */
 
-#define BCM2835_AUX_BASE         (0x20215000)
+#define BCM2835_AUX_BASE         (RPI_PERIPHERAL_BASE + 0x215000)
 
 #define AUX_ENABLES              (BCM2835_AUX_BASE+0x04)
 #define AUX_MU_IO_REG            (BCM2835_AUX_BASE+0x40)
@@ -115,7 +129,7 @@
  */
 
 
-#define BCM2835_UART0_BASE       (0x20201000)
+#define BCM2835_UART0_BASE       (RPI_PERIPHERAL_BASE + 0x201000)
 
 #define BCM2835_UART0_DR         (BCM2835_UART0_BASE+0x00)
 #define BCM2835_UART0_RSRECR     (BCM2835_UART0_BASE+0x04)
@@ -155,7 +169,7 @@
  * @{
  */
 
-#define BCM2835_BASE_INTC         (0x2000B200)
+#define BCM2835_BASE_INTC         (RPI_PERIPHERAL_BASE + 0xB200)
 
 #define BCM2835_IRQ_BASIC         (BCM2835_BASE_INTC + 0x00)
 #define BCM2835_IRQ_PENDING1      (BCM2835_BASE_INTC + 0x04)
@@ -182,7 +196,7 @@
  *       it's own RTOS. 1 and 3 are available for use in
  *       RTEMS.
  */
-#define BCM2835_GPU_TIMER_BASE    (0x20003000)
+#define BCM2835_GPU_TIMER_BASE    (RPI_PERIPHERAL_BASE + 0x3000)
 
 #define BCM2835_GPU_TIMER_CS      (BCM2835_TIMER_BASE+0x00)
 #define BCM2835_GPU_TIMER_CLO     (BCM2835_TIMER_BASE+0x04)
diff --git a/c/src/lib/libbsp/arm/raspberrypi/make/custom/raspberrypi.cfg b/c/src/lib/libbsp/arm/raspberrypi/make/custom/raspberrypi.cfg
index 48ac0f8d86..759b79d8f6 100644
--- a/c/src/lib/libbsp/arm/raspberrypi/make/custom/raspberrypi.cfg
+++ b/c/src/lib/libbsp/arm/raspberrypi/make/custom/raspberrypi.cfg
@@ -1,20 +1,7 @@
 #
 #  Config file for RASPBERRYPI
 #
-
-include $(RTEMS_ROOT)/make/custom/default.cfg
-
-RTEMS_CPU = arm
+include $(RTEMS_ROOT)/make/custom/raspberrypi.inc
 
 CPU_CFLAGS = -mcpu=arm1176jzf-s
 
-CFLAGS_OPTIMIZE_V = -O2 -g
-
-# This defines the operations performed on the linked executable.
-# is currently required.
-define bsp-post-link
-    $(OBJCOPY) -O binary --strip-all \
-        $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT)
-    $(SIZE) $(basename $@)$(EXEEXT)
-endef
-
diff --git a/c/src/lib/libbsp/arm/raspberrypi/make/custom/raspberrypi.inc b/c/src/lib/libbsp/arm/raspberrypi/make/custom/raspberrypi.inc
new file mode 100644
index 0000000000..3b4fb50e58
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberrypi/make/custom/raspberrypi.inc
@@ -0,0 +1,17 @@
+#
+#  Config file for Raspberry Pi variants.
+#
+
+include $(RTEMS_ROOT)/make/custom/default.cfg
+
+RTEMS_CPU = arm
+
+CFLAGS_OPTIMIZE_V ?= -O2 -g
+
+# This defines the operations performed on the linked executable.
+# is currently required.
+define bsp-post-link
+    $(OBJCOPY) -O binary --strip-all \
+        $(basename $@)$(EXEEXT) $(basename $@)$(DOWNEXT)
+    $(SIZE) $(basename $@)$(EXEEXT)
+endef
diff --git a/c/src/lib/libbsp/arm/raspberrypi/make/custom/raspberrypi2.cfg b/c/src/lib/libbsp/arm/raspberrypi/make/custom/raspberrypi2.cfg
new file mode 100644
index 0000000000..08dda04883
--- /dev/null
+++ b/c/src/lib/libbsp/arm/raspberrypi/make/custom/raspberrypi2.cfg
@@ -0,0 +1,6 @@
+#
+#  Config file for RASPBERRYPI 2
+#
+include $(RTEMS_ROOT)/make/custom/raspberrypi.inc
+
+CPU_CFLAGS = -march=armv7-a -mtune=cortex-a7
diff --git a/c/src/lib/libbsp/arm/raspberrypi/startup/mm_config_table.c b/c/src/lib/libbsp/arm/raspberrypi/startup/mm_config_table.c
index 398ba98096..8a6d37a45a 100644
--- a/c/src/lib/libbsp/arm/raspberrypi/startup/mm_config_table.c
+++ b/c/src/lib/libbsp/arm/raspberrypi/startup/mm_config_table.c
@@ -20,6 +20,7 @@
  * http://www.rtems.org/license/LICENSE.
  */
 
+#include <bsp.h>
 #include <bsp/arm-cp15-start.h>
 
 const arm_cp15_start_section_config arm_cp15_start_mmu_config_table[] = {
@@ -64,8 +65,8 @@ const arm_cp15_start_section_config arm_cp15_start_mmu_config_table[] = {
     .end = (uint32_t) bsp_section_stack_end,
     .flags = ARMV7_MMU_DATA_READ_WRITE_CACHED
   }, {
-    .begin = 0x20000000,
-    .end = 0x21000000,
+    .begin = RPI_PERIPHERAL_BASE,
+    .end =   RPI_PERIPHERAL_BASE + RPI_PERIPHERAL_SIZE,
     .flags = ARMV7_MMU_DEVICE
   }
 };