Added FPSP support for MC68040

4 files changed, 90 insertions, 7 deletions

diff --git a/c/src/exec/score/cpu/m68k/cpu.c b/c/src/exec/score/cpu/m68k/cpu.c
index 6d3f1a06a4..34e2ed3a82 100644
--- a/c/src/exec/score/cpu/m68k/cpu.c
+++ b/c/src/exec/score/cpu/m68k/cpu.c
@@ -76,10 +76,27 @@ void _CPU_ISR_install_raw_handler(
 {
   proc_ptr *interrupt_table = NULL;
 
-  m68k_get_vbr( interrupt_table );
+#if (M68K_HAS_FPSP_PACKAGE == 1)
+  /*
+   *  If this vector being installed is one related to FP, then the
+   *  FPSP will install the handler itself and handle it completely
+   *  with no intervention from RTEMS.
+   */
+
+  if (*_FPSP_install_raw_handler &&
+      (*_FPSP_install_raw_handler)(vector, new_handler, *old_handler))
+        return;
+#endif
 
-  *old_handler = interrupt_table[ vector ];
 
+  /*
+   *  On CPU models without a VBR, it is necessary for there to be some
+   *  header code for each ISR which saves a register, loads the vector
+   *  number, and jumps to _ISR_Handler. 
+   */
+
+  m68k_get_vbr( interrupt_table );
+  *old_handler = interrupt_table[ vector ];
 #if ( M68K_HAS_VBR == 1 )
   interrupt_table[ vector ] = new_handler;
 #else
diff --git a/c/src/exec/score/cpu/m68k/cpu.h b/c/src/exec/score/cpu/m68k/cpu.h
index 5f2311b16b..9fe0bf6443 100644
--- a/c/src/exec/score/cpu/m68k/cpu.h
+++ b/c/src/exec/score/cpu/m68k/cpu.h
@@ -474,7 +474,7 @@ void _CPU_Context_switch(
  *  This routine saves the floating point context passed to it.
  */
 
-void _CPU_Context_restore_fp(
+void _CPU_Context_save_fp(
   void **fp_context_ptr
 );
 
@@ -484,9 +484,47 @@ void _CPU_Context_restore_fp(
  *  This routine restores the floating point context passed to it.
  */
 
-void _CPU_Context_save_fp(
+void _CPU_Context_restore_fp(
   void **fp_context_ptr
 );
+
+#if (M68K_HAS_FPSP_PACKAGE == 1)
+/*
+ *  Hooks for the Floating Point Support Package (FPSP) provided by Motorola
+ *
+ *  NOTES:  
+ *
+ *  Motorola 68k family CPU's before the 68040 used a coprocessor
+ *  (68881 or 68882) to handle floating point.  The 68040 has internal
+ *  floating point support -- but *not* the complete support provided by
+ *  the 68881 or 68882.  The leftover functions are taken care of by the
+ *  M68040 Floating Point Support Package.  Quoting from the MC68040
+ *  Microprocessors User's Manual, Section 9, Floating-Point Unit (MC68040):
+ *
+ *    "When used with the M68040FPSP, the MC68040 FPU is fully
+ *    compliant with IEEE floating-point standards."
+ *
+ *  M68KFPSPInstallExceptionHandlers is in libcpu/m68k/MODEL/fpsp and
+ *  is invoked early in the application code to insure that proper FP
+ *  behavior is installed.  This is not left to the BSP to call, since
+ *  this would force all applications using that BSP to use FPSP which
+ *  is not necessarily desirable.
+ *
+ *  There is a similar package for the 68060 but RTEMS does not yet
+ *  support the 68060.
+ */
+
+void M68KFPSPInstallExceptionHandlers (void);
+
+SCORE_EXTERN int (*_FPSP_install_raw_handler)(
+  unsigned32 vector,
+  proc_ptr new_handler,
+  proc_ptr *old_handler
+);
+
+#endif
+
+
 #endif
 
 #ifdef __cplusplus
diff --git a/c/src/exec/score/cpu/m68k/m68k.h b/c/src/exec/score/cpu/m68k/m68k.h
index feee5052b4..0eb3f0fd4c 100644
--- a/c/src/exec/score/cpu/m68k/m68k.h
+++ b/c/src/exec/score/cpu/m68k/m68k.h
@@ -37,6 +37,7 @@ extern "C" {
  *     m68lc040      (no FP)
  *     m68ec040      (no FP)
  *     m68302        (no FP)
+ *     m68332        (no FP)
  *     mcpu32        (no FP)  (includes m68360)
  *
  *  Primary difference (for RTEMS) between m68040, m680lc040, and 
@@ -62,7 +63,7 @@ extern "C" {
  *
  *  NOTE:
  *    Eventually it would be nice to evaluate doing a lot of this section
- *    by having each model specigy which core it uses and then go from there.
+ *    by having each model specify which core it uses and then go from there.
  */
 
 #if defined(m68000)
@@ -74,6 +75,7 @@ extern "C" {
 #define M68K_HAS_BFFFO           0
 #define M68K_HAS_PREINDEXING     0
 #define M68K_HAS_EXTB_L          0
+#define M68K_HAS_FPSP_PACKAGE    0
 
 #elif defined(m68020)
  
@@ -84,6 +86,7 @@ extern "C" {
 #define M68K_HAS_BFFFO           1
 #define M68K_HAS_PREINDEXING     1
 #define M68K_HAS_EXTB_L          1
+#define M68K_HAS_FPSP_PACKAGE    0
  
 #elif defined(m68020_nofp)
  
@@ -94,6 +97,7 @@ extern "C" {
 #define M68K_HAS_BFFFO           1
 #define M68K_HAS_PREINDEXING     1
 #define M68K_HAS_EXTB_L          1
+#define M68K_HAS_FPSP_PACKAGE    0
  
 #elif defined(m68030)
  
@@ -104,6 +108,7 @@ extern "C" {
 #define M68K_HAS_BFFFO           1
 #define M68K_HAS_PREINDEXING     1
 #define M68K_HAS_EXTB_L          1
+#define M68K_HAS_FPSP_PACKAGE    0
  
 #elif defined(m68040)
 
@@ -114,6 +119,7 @@ extern "C" {
 #define M68K_HAS_BFFFO           1
 #define M68K_HAS_PREINDEXING     1
 #define M68K_HAS_EXTB_L          1
+#define M68K_HAS_FPSP_PACKAGE    1
  
 #elif defined(m68lc040)
 
@@ -124,6 +130,7 @@ extern "C" {
 #define M68K_HAS_BFFFO           1
 #define M68K_HAS_PREINDEXING     1
 #define M68K_HAS_EXTB_L          1
+#define M68K_HAS_FPSP_PACKAGE    0
  
 #elif defined(m68ec040)
 
@@ -134,6 +141,7 @@ extern "C" {
 #define M68K_HAS_BFFFO           1
 #define M68K_HAS_PREINDEXING     1
 #define M68K_HAS_EXTB_L          1
+#define M68K_HAS_FPSP_PACKAGE    0
 
 #elif defined(m68302)
  /* essentially a m68000 with onboard peripherals */
@@ -144,6 +152,7 @@ extern "C" {
 #define M68K_HAS_BFFFO           0
 #define M68K_HAS_PREINDEXING     0
 #define M68K_HAS_EXTB_L          0
+#define M68K_HAS_FPSP_PACKAGE    0
 
 #elif defined(m68332)
  
@@ -154,6 +163,7 @@ extern "C" {
 #define M68K_HAS_BFFFO           0
 #define M68K_HAS_PREINDEXING     0
 #define M68K_HAS_EXTB_L          1
+#define M68K_HAS_FPSP_PACKAGE    0
 
 #elif defined(mcpu32)
  
@@ -164,6 +174,7 @@ extern "C" {
 #define M68K_HAS_BFFFO           0
 #define M68K_HAS_PREINDEXING     1
 #define M68K_HAS_EXTB_L          1
+#define M68K_HAS_FPSP_PACKAGE    0
 
 #else
 
diff --git a/cpukit/score/cpu/m68k/cpu.c b/cpukit/score/cpu/m68k/cpu.c
index 6d3f1a06a4..34e2ed3a82 100644
--- a/cpukit/score/cpu/m68k/cpu.c
+++ b/cpukit/score/cpu/m68k/cpu.c
@@ -76,10 +76,27 @@ void _CPU_ISR_install_raw_handler(
 {
   proc_ptr *interrupt_table = NULL;
 
-  m68k_get_vbr( interrupt_table );
+#if (M68K_HAS_FPSP_PACKAGE == 1)
+  /*
+   *  If this vector being installed is one related to FP, then the
+   *  FPSP will install the handler itself and handle it completely
+   *  with no intervention from RTEMS.
+   */
+
+  if (*_FPSP_install_raw_handler &&
+      (*_FPSP_install_raw_handler)(vector, new_handler, *old_handler))
+        return;
+#endif
 
-  *old_handler = interrupt_table[ vector ];
 
+  /*
+   *  On CPU models without a VBR, it is necessary for there to be some
+   *  header code for each ISR which saves a register, loads the vector
+   *  number, and jumps to _ISR_Handler. 
+   */
+
+  m68k_get_vbr( interrupt_table );
+  *old_handler = interrupt_table[ vector ];
 #if ( M68K_HAS_VBR == 1 )
   interrupt_table[ vector ] = new_handler;
 #else