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authorSudarshan Rajagopalan <sudarshan.rajagopalan@vecna.com>2015-08-27 14:19:24 -0400
committerSebastian Huber <sebastian.huber@embedded-brains.de>2017-02-15 14:18:53 +0100
commit5b5ef4e479dbb437b96601e3ef4e5fc508e22dd3 (patch)
tree8b3d875ac1ba0f0890e4bd49f85929c7d2ee148e
parent04684cbc436f79339854c4bca22f65bb947f6949 (diff)
downloadrtems-5b5ef4e479dbb437b96601e3ef4e5fc508e22dd3.tar.bz2
Fix exception handler for supporting FPU
Close #2401.
-rw-r--r--cpukit/score/cpu/arm/armv7m-exception-default.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/cpukit/score/cpu/arm/armv7m-exception-default.c b/cpukit/score/cpu/arm/armv7m-exception-default.c
index e890cdfe96..2ddc6fc772 100644
--- a/cpukit/score/cpu/arm/armv7m-exception-default.c
+++ b/cpukit/score/cpu/arm/armv7m-exception-default.c
@@ -28,10 +28,10 @@ void __attribute__((naked)) _ARMV7M_Exception_default( void )
"mov r2, lr\n"
"mrs r1, msp\n"
"mrs r0, psp\n"
- "cmn r2, #3\n"
- "itt ne\n"
- "movne r0, r1\n"
- "addne r0, %[cpufsz]\n"
+ "tst lr, #4\n"
+ "itt eq\n"
+ "moveq r0, r1\n"
+ "addeq r0, %[cpufsz]\n"
"add r2, r0, %[v7mlroff]\n"
"add r1, sp, %[cpulroff]\n"
"ldm r2, {r3-r5}\n"