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authorPavel Pisa <pisa@cmp.felk.cvut.cz>2016-09-12 10:46:58 +0200
committerPavel Pisa <pisa@cmp.felk.cvut.cz>2016-09-22 08:26:29 +0200
commit5746f108bd162f9ef453885d013e78a37ce1e497 (patch)
treea174a2f099878e929684caa194c1ef4b4a45abb1
parenta396ed4778bb989c5651c0f05528cca1ea474d42 (diff)
downloadrtems-5746f108bd162f9ef453885d013e78a37ce1e497.tar.bz2
arm/tms570: define base addresses of all TMS570LS3137 SPI interfaces.
Generated header file ti_herc/reg_spi.h contains complete registers and fields set for Ti MibSPI peripheral. Care has to be taken that only TMS570_SPI1, TMS570_SPI3 and TMS570_SPI5 are of this complete multibuffer type. TMS570_SPI2 and TMS570_SPI4 have substantial part of registers removed but else they are compatible.
-rw-r--r--c/src/lib/libbsp/arm/tms570/include/tms570.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/arm/tms570/include/tms570.h b/c/src/lib/libbsp/arm/tms570/include/tms570.h
index f3daac11de..f278a93606 100644
--- a/c/src/lib/libbsp/arm/tms570/include/tms570.h
+++ b/c/src/lib/libbsp/arm/tms570/include/tms570.h
@@ -125,7 +125,11 @@
#define TMS570_TCRAM2 (*(volatile tms570_tcram_t*)0xFFFFF900)
#define TMS570_VIM (*(volatile tms570_vim_t*)0XFFFFFDEC)
#define TMS570_POM (*(volatile tms570_pom_t*)0XFFA04000)
-#define TMS570_SPI (*(volatile tms570_spi_t*)0xFFF7F400)
+#define TMS570_SPI1 (*(volatile tms570_spi_t*)0xFFF7F400)
+#define TMS570_SPI2 (*(volatile tms570_spi_t*)0xFFF7F600)
+#define TMS570_SPI3 (*(volatile tms570_spi_t*)0xFFF7F800)
+#define TMS570_SPI4 (*(volatile tms570_spi_t*)0xFFF7FA00)
+#define TMS570_SPI5 (*(volatile tms570_spi_t*)0xFFF7FC00)
#define TMS570_STC (*(volatile tms570_stc_t*)0xFFFFE600)
#define TMS570_SYS1 (*(volatile tms570_sys1_t*)0xFFFFFF00)
#define TMS570_SYS2 (*(volatile tms570_sys2_t*)0xFFFFE100)