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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-06-21 09:59:27 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2013-06-26 09:50:27 +0200 |
| commit | 4b83e8f1c415f5365ae4cc0b9894c2174ee9f670 (patch) | |
| tree | 4287637f32de45dc0d5e42b7231a20bac24acffe | |
| parent | tmtests/tm20: Change allocation sizes (diff) | |
| download | rtems-4b83e8f1c415f5365ae4cc0b9894c2174ee9f670.tar.bz2 | |
bsps/arm: Fix set exception handler for ARMv7
| -rw-r--r-- | c/src/lib/libbsp/arm/shared/arm-cp15-set-exception-handler.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/shared/arm-cp15-set-exception-handler.c b/c/src/lib/libbsp/arm/shared/arm-cp15-set-exception-handler.c index 01db6d8cf3..6497acae67 100644 --- a/c/src/lib/libbsp/arm/shared/arm-cp15-set-exception-handler.c +++ b/c/src/lib/libbsp/arm/shared/arm-cp15-set-exception-handler.c @@ -37,7 +37,15 @@ void arm_cp15_set_exception_handler( ctrl = arm_cp15_mmu_disable(cls); mirror_table[exception] = (uint32_t) handler; + rtems_cache_flush_multiple_data_lines(mirror_table, table_size); + + /* + * On ARMv7 processors with the Security Extension the mirror table might + * be the actual table used by the processor. + */ + rtems_cache_invalidate_multiple_instruction_lines(mirror_table, table_size); + rtems_cache_invalidate_multiple_instruction_lines(cpu_table, table_size); arm_cp15_set_control(ctrl); |