Rename or1ksim BSP to generic_or1k

or1ksim BSP was initially named after or1ksim simulator, and it was
intented to only run there. But now it can also run on QEMU, jor1k and
real FPGA boards without modifications. It makes more sense to give
it a new generic name like generic_or1k.

24 files changed, 255 insertions, 255 deletions

diff --git a/c/src/lib/libbsp/or1k/acinclude.m4 b/c/src/lib/libbsp/or1k/acinclude.m4
index c593670d13..c6bc720dfd 100644
--- a/c/src/lib/libbsp/or1k/acinclude.m4
+++ b/c/src/lib/libbsp/or1k/acinclude.m4
@@ -2,8 +2,8 @@
 AC_DEFUN([RTEMS_CHECK_BSPDIR],
 [
   case "$1" in
-  or1ksim )
-    AC_CONFIG_SUBDIRS([or1ksim]);;
+  generic_or1k )
+    AC_CONFIG_SUBDIRS([generic_or1k]);;
   *)
     AC_MSG_ERROR([Invalid BSP]);;
   esac
diff --git a/c/src/lib/libbsp/or1k/configure.ac b/c/src/lib/libbsp/or1k/configure.ac
index c07615b18d..e809e40958 100644
--- a/c/src/lib/libbsp/or1k/configure.ac
+++ b/c/src/lib/libbsp/or1k/configure.ac
@@ -2,7 +2,7 @@
 
 AC_PREREQ([2.69])
 AC_INIT([rtems-c-src-lib-libbsp-or1k],[_RTEMS_VERSION],[https://devel.rtems.org/newticket])
-AC_CONFIG_SRCDIR([or1ksim])
+AC_CONFIG_SRCDIR([generic_or1k])
 RTEMS_TOP(../../../../..)
 
 RTEMS_CANONICAL_TARGET_CPU
diff --git a/c/src/lib/libbsp/or1k/or1ksim/Makefile.am b/c/src/lib/libbsp/or1k/generic_or1k/Makefile.am
index 7a871b511e..66df24efe3 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/Makefile.am
+++ b/c/src/lib/libbsp/or1k/generic_or1k/Makefile.am
@@ -1,7 +1,7 @@
 #
 # @file
 #
-# @brief Makefile of LibBSP for the or1ksim BSP.
+# @brief Makefile of LibBSP for the generic_or1k BSP.
 #
 
 ACLOCAL_AMFLAGS = -I ../../../../aclocal
@@ -32,7 +32,7 @@ include_bsp_HEADERS += ../../shared/include/uart-output-char.h
 include_bsp_HEADERS += ../shared/include/cache_.h
 include_bsp_HEADERS += include/irq.h
 include_bsp_HEADERS += include/uart.h
-include_bsp_HEADERS += include/or1ksim.h
+include_bsp_HEADERS += include/generic_or1k.h
 
 nodist_include_HEADERS = ../../shared/include/coverhd.h \
   include/bspopts.h
diff --git a/c/src/lib/libbsp/or1k/or1ksim/README b/c/src/lib/libbsp/or1k/generic_or1k/README
index 22ecbfa333..015286c208 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/README
+++ b/c/src/lib/libbsp/or1k/generic_or1k/README
@@ -1,5 +1,4 @@
-This BSP should run on or1ksim: the main simulator for or1k architecture.
-or1ksim should be used for testing purposes. It also runs on QEMU.
+This BSP can run on or1ksim, QEMU, jor1k [1] and OpenRISC supported FPGA boards.
 
 $ git clone git@github.com:openrisc/or1ksim.git
 $ cd or1ksim
@@ -20,10 +19,6 @@ rtems-tools/sim-scripts.
 
 From command line type:
 
-$ sim -f sim.cfg $PATH_TO_RTEMS_EXE (old or1ksim releases)
-
-or (if you use a stable/gitgub or1ksim release)
-
 $ or1k-elf-sim -f sim.cfg $PATH_TO_RTEMS_EXE
 
 From QEMU:
@@ -35,3 +30,5 @@ from sim-scripts:
 
 $ or1ksim $PATH_TO_RTEMS_EXE
 $ qemu-or1k $PATH_TO_RTEMS_EXE
+
+[1] http://s-macke.github.io/jor1k/demos/rtems.html
diff --git a/c/src/lib/libbsp/or1k/or1ksim/bsp_specs b/c/src/lib/libbsp/or1k/generic_or1k/bsp_specs
index 0fcd2dcc11..0fcd2dcc11 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/bsp_specs
+++ b/c/src/lib/libbsp/or1k/generic_or1k/bsp_specs
diff --git a/c/src/lib/libbsp/or1k/or1ksim/clock/clockdrv.c b/c/src/lib/libbsp/or1k/generic_or1k/clock/clockdrv.c
index 4169a11fbb..57e46c1897 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/clock/clockdrv.c
+++ b/c/src/lib/libbsp/or1k/generic_or1k/clock/clockdrv.c
@@ -3,13 +3,13 @@
  *
  * @ingroup bsp_clock
  *
- * @brief or1ksim clock support.
+ * @brief or1k clock support.
  */
 
 /*
- * or1ksim Clock driver
+ * generic_or1k Clock driver
  *
- * COPYRIGHT (c) 2014 Hesham ALMatary <heshamelmatary@gmail.com>
+ * COPYRIGHT (c) 2014-2015 Hesham ALMatary <heshamelmatary@gmail.com>
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
@@ -19,13 +19,13 @@
 #include <rtems.h>
 #include <bsp.h>
 #include <bsp/irq.h>
-#include <bsp/or1ksim.h>
+#include <bsp/generic_or1k.h>
 #include <rtems/score/cpu.h>
 #include <rtems/score/or1k-utility.h>
 
 /* The number of clock cycles before generating a tick timer interrupt. */
 #define TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT     0x09ED9
-#define OR1KSIM_CLOCK_CYCLE_TIME_NANOSECONDS  10
+#define OR1K_CLOCK_CYCLE_TIME_NANOSECONDS     10
 
 /* CPU counter */
 static CPU_Counter_ticks cpu_counter_ticks;
@@ -33,7 +33,7 @@ static CPU_Counter_ticks cpu_counter_ticks;
 /* This prototype is added here to Avoid warnings */
 void Clock_isr(void *arg);
 
-static void or1ksim_clock_at_tick(void)
+static void generic_or1k_clock_at_tick(void)
 {
   uint32_t TTMR;
 
@@ -53,7 +53,10 @@ static void or1ksim_clock_at_tick(void)
   cpu_counter_ticks += TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT;
 }
 
-static void or1ksim_clock_handler_install(proc_ptr new_isr, proc_ptr old_isr)
+static void generic_or1k_clock_handler_install(
+  proc_ptr new_isr,
+   proc_ptr old_isr
+)
 {
   rtems_status_code sc = RTEMS_SUCCESSFUL;
   old_isr = NULL;
@@ -66,7 +69,7 @@ static void or1ksim_clock_handler_install(proc_ptr new_isr, proc_ptr old_isr)
   }
 }
 
-static void or1ksim_clock_initialize(void)
+static void generic_or1k_clock_initialize(void)
 {
   uint32_t TTMR;
 
@@ -91,7 +94,7 @@ static void or1ksim_clock_initialize(void)
   cpu_counter_ticks = 0;
 }
 
- static void or1ksim_clock_cleanup(void)
+ static void generic_or1k_clock_cleanup(void)
 {
  uint32_t sr;
 
@@ -109,10 +112,10 @@ static void or1ksim_clock_initialize(void)
 /*
  *  Return the nanoseconds since last tick
  */
-static uint32_t or1ksim_clock_nanoseconds_since_last_tick(void)
+static uint32_t generic_or1k_clock_nanoseconds_since_last_tick(void)
 {
   return
-  TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT * OR1KSIM_CLOCK_CYCLE_TIME_NANOSECONDS;
+  TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT * OR1K_CLOCK_CYCLE_TIME_NANOSECONDS;
 }
 
 CPU_Counter_ticks _CPU_Counter_read(void)
@@ -131,19 +134,19 @@ CPU_Counter_ticks _CPU_Counter_difference(
 {
   return second - first;
 }
-#define Clock_driver_support_at_tick() or1ksim_clock_at_tick()
+#define Clock_driver_support_at_tick() generic_or1k_clock_at_tick()
 
-#define Clock_driver_support_initialize_hardware() or1ksim_clock_initialize()
+#define Clock_driver_support_initialize_hardware() generic_or1k_clock_initialize()
 
 #define Clock_driver_support_install_isr(isr, old_isr) \
   do {                                                 \
     old_isr = NULL;                                    \
-    or1ksim_clock_handler_install(isr, old_isr);       \
+    generic_or1k_clock_handler_install(isr, old_isr);       \
   } while (0)
 
-#define Clock_driver_support_shutdown_hardware() or1ksim_clock_cleanup()
+#define Clock_driver_support_shutdown_hardware() generic_or1k_clock_cleanup()
 
 #define Clock_driver_nanoseconds_since_last_tick \
-  or1ksim_clock_nanoseconds_since_last_tick
+  generic_or1k_clock_nanoseconds_since_last_tick
 
 #include "../../../shared/clockdrv_shell.h"
diff --git a/c/src/lib/libbsp/or1k/or1ksim/configure.ac b/c/src/lib/libbsp/or1k/generic_or1k/configure.ac
index 70f76f1217..9d78c44f9e 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/configure.ac
+++ b/c/src/lib/libbsp/or1k/generic_or1k/configure.ac
@@ -1,11 +1,11 @@
 #
 # @file
 #
-# @brief Configure script of LibBSP for or1ksim BSP.
+# @brief Configure script of LibBSP for generic_or1k BSP.
 #
 
 AC_PREREQ(2.69)
-AC_INIT([rtems-c-src-lib-libbsp-or1k-or1ksim],[_RTEMS_VERSION],[https://devel.rtems.org/newticket])
+AC_INIT([rtems-c-src-lib-libbsp-or1k-generic],[_RTEMS_VERSION],[https://devel.rtems.org/newticket])
 AC_CONFIG_SRCDIR([bsp_specs])
 RTEMS_TOP(../../../../../..)
 
@@ -16,8 +16,8 @@ RTEMS_BSP_CONFIGURE
 RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[])
 RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start])
 
-RTEMS_BSPOPTS_SET([BSP_OR1K_OR1KSIM_PERIPHCLK],[*],[50000000U])
-RTEMS_BSPOPTS_HELP([BSP_OR1K_OR1KSIM_PERIPHCLK],[or1ksim PERIPHCLK clock frequency in Hz])
+RTEMS_BSPOPTS_SET([BSP_GENERIC_OR1K_PERIPHCLK],[*],[50000000U])
+RTEMS_BSPOPTS_HELP([BSP_GENERIC_OR1K_PERIPHCLK],[or1k PERIPHCLK clock frequency in Hz])
 
 RTEMS_PROG_CC_FOR_TARGET([-ansi -fasm])
 RTEMS_CANONICALIZE_TOOLS
diff --git a/c/src/lib/libbsp/or1k/or1ksim/console/console-config.c b/c/src/lib/libbsp/or1k/generic_or1k/console/console-config.c
index 9853f2041d..a5b29a9745 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/console/console-config.c
+++ b/c/src/lib/libbsp/or1k/generic_or1k/console/console-config.c
@@ -1,13 +1,13 @@
 /**
  * @file
  *
- * @ingroup or1ksim_uart
+ * @ingroup generic_or1k_uart
  *
  * @brief Console Configuration.
  */
 
 /*
- * Copyright (c) 2014 Hesham ALMatary
+ * Copyright (c) 2014-2015 Hesham ALMatary
  *
  *  The license and distribution terms for this file may be
  *  found in the file LICENSE in this distribution or at
@@ -20,19 +20,19 @@
 
 #include <bspopts.h>
 #include <bsp/uart.h>
-#include <bsp/or1ksim.h>
+#include <bsp/generic_or1k.h>
 
 console_tbl Console_Configuration_Ports [] = {
     {
       .sDeviceName = "/dev/ttyS0",
       .deviceType = SERIAL_CUSTOM,
-      .pDeviceFns = &or1ksim_uart_fns,
+      .pDeviceFns = &generic_or1k_uart_fns,
       .deviceProbe = NULL,
       .pDeviceFlow = NULL,
-      .ulCtrlPort1 = OR1KSIM_BSP_UART_BASE,
+      .ulCtrlPort1 = OR1K_BSP_UART_BASE,
       .ulCtrlPort2 = 0,
-      .ulClock = OR1KSIM_UART_DEFAULT_BAUD,
-      .ulIntVector = OR1KSIM_BSP_UART_IRQ
+      .ulClock = OR1K_UART_DEFAULT_BAUD,
+      .ulIntVector = OR1K_BSP_UART_IRQ
     }
 };
 
diff --git a/c/src/lib/libbsp/or1k/or1ksim/console/uart.c b/c/src/lib/libbsp/or1k/generic_or1k/console/uart.c
index 87b1aeaa07..6f8a49443d 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/console/uart.c
+++ b/c/src/lib/libbsp/or1k/generic_or1k/console/uart.c
@@ -1,13 +1,13 @@
 /**
  * @file
  *
- * @ingroup or1ksim_uart
+ * @ingroup generic_or1k_uart
  *
  * @brief UART support.
  */
 
 /*
- * COPYRIGHT (c) 2014 Hesham ALMatary <heshamelmatary@gmail.com>
+ * COPYRIGHT (c) 2014-2015 Hesham ALMatary <heshamelmatary@gmail.com>
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
@@ -15,7 +15,7 @@
  */
 
 #include <libchip/sersupp.h>
-#include <bsp/or1ksim.h>
+#include <bsp/generic_or1k.h>
 #include <bsp.h>
 #include <bsp/irq.h>
 #include <bsp/uart.h>
@@ -46,33 +46,33 @@ static uint32_t uart_get_baud(const console_tbl *ct)
 
 static void uart_set_baud(int baud)
 {
-  uint16_t divisor = (OR1KSIM_BSP_CLOCK_FREQ) / (16 * baud);
-  OR1KSIM_REG(OR1KSIM_BSP_UART_REG_LINE_CTRL) =
-    OR1KSIM_BSP_UART_REG_LINE_CTRL_DLAB;
+  uint16_t divisor = (OR1K_BSP_CLOCK_FREQ) / (16 * baud);
+  OR1K_REG(OR1K_BSP_UART_REG_LINE_CTRL) =
+    OR1K_BSP_UART_REG_LINE_CTRL_DLAB;
 
-  OR1KSIM_REG(OR1KSIM_BSP_UART_REG_DEV_LATCH_LOW) = divisor & 0xff;
+  OR1K_REG(OR1K_BSP_UART_REG_DEV_LATCH_LOW) = divisor & 0xff;
 
-  OR1KSIM_REG(OR1KSIM_BSP_UART_REG_DEV_LATCH_HIGH) =
+  OR1K_REG(OR1K_BSP_UART_REG_DEV_LATCH_HIGH) =
     (divisor >> 8);
 }
 
 static void uart_initialize(int minor)
 {
   /* Set baud rate */
-  uart_set_baud(OR1KSIM_UART_DEFAULT_BAUD);
+  uart_set_baud(OR1K_UART_DEFAULT_BAUD);
 
   /* Set data pattern configuration */
-  OR1KSIM_REG(OR1KSIM_BSP_UART_REG_LINE_CTRL) =
-    OR1KSIM_BSP_UART_REG_LINE_CTRL_WLEN8;
+  OR1K_REG(OR1K_BSP_UART_REG_LINE_CTRL) =
+    OR1K_BSP_UART_REG_LINE_CTRL_WLEN8;
 
   /* Reset receiver and transmitter */
-  OR1KSIM_REG(OR1KSIM_BSP_UART_REG_FIFO_CTRL) =
-    OR1KSIM_BSP_UART_REG_FIFO_CTRL_ENABLE_FIFO |
-    OR1KSIM_BSP_UART_REG_FIFO_CTRL_CLEAR_RCVR  |
-    OR1KSIM_BSP_UART_REG_FIFO_CTRL_TRIGGER_14;
+  OR1K_REG(OR1K_BSP_UART_REG_FIFO_CTRL) =
+    OR1K_BSP_UART_REG_FIFO_CTRL_ENABLE_FIFO |
+    OR1K_BSP_UART_REG_FIFO_CTRL_CLEAR_RCVR  |
+    OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_14;
 
   /* Disable all interrupts */
-  OR1KSIM_REG(OR1KSIM_BSP_UART_REG_INT_ENABLE) = 0x00;
+  OR1K_REG(OR1K_BSP_UART_REG_INT_ENABLE) = 0x00;
 
 }
 
@@ -100,11 +100,11 @@ static int uart_read_polled(int minor)
 
  /* Get a character when avaiable */
   do {
-       lsr = OR1KSIM_REG(OR1KSIM_BSP_UART_REG_LINE_STATUS);
-  } while ((lsr & OR1KSIM_BSP_UART_REG_LINE_STATUS_DR)
-           != OR1KSIM_BSP_UART_REG_LINE_STATUS_DR);
+       lsr = OR1K_REG(OR1K_BSP_UART_REG_LINE_STATUS);
+  } while ((lsr & OR1K_BSP_UART_REG_LINE_STATUS_DR)
+           != OR1K_BSP_UART_REG_LINE_STATUS_DR);
 
-  return OR1KSIM_REG(OR1KSIM_BSP_UART_REG_RX);
+  return OR1K_REG(OR1K_BSP_UART_REG_RX);
 }
 
 static void uart_write_polled(int minor, char c)
@@ -113,10 +113,10 @@ static void uart_write_polled(int minor, char c)
 
   /* Wait until there is no pending data in the transmitter FIFO (empty) */
   do {
-      lsr = OR1KSIM_REG(OR1KSIM_BSP_UART_REG_LINE_STATUS);
-  } while (!(lsr & OR1KSIM_BSP_UART_REG_LINE_STATUS_THRE));
+      lsr = OR1K_REG(OR1K_BSP_UART_REG_LINE_STATUS);
+  } while (!(lsr & OR1K_BSP_UART_REG_LINE_STATUS_THRE));
 
-  OR1KSIM_REG(OR1KSIM_BSP_UART_REG_TX) = c;
+  OR1K_REG(OR1K_BSP_UART_REG_TX) = c;
 }
 
 static ssize_t uart_write(
@@ -139,7 +139,7 @@ static int uart_set_attributes(int minor, const struct termios *term)
   return -1;
 }
 
-const console_fns or1ksim_uart_fns = {
+const console_fns generic_or1k_uart_fns = {
   .deviceProbe = libchip_serial_default_probe,
   .deviceFirstOpen = uart_first_open,
   .deviceLastClose = uart_last_close,
diff --git a/c/src/lib/libbsp/or1k/or1ksim/include/bsp.h b/c/src/lib/libbsp/or1k/generic_or1k/include/bsp.h
index 502e4d9302..72bb107e55 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/include/bsp.h
+++ b/c/src/lib/libbsp/or1k/generic_or1k/include/bsp.h
@@ -1,27 +1,27 @@
 /**
  * @file
  *
- * @ingroup or1k_or1ksim
+ * @ingroup generic_or1k
  *
  * @brief Global BSP definitions.
  */
 
 /*
- * COPYRIGHT (c) 2014 Hesham ALMatary <heshamelmatary@gmail.com>
+ * COPYRIGHT (c) 2014-2015 Hesham ALMatary <heshamelmatary@gmail.com>
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
  *  http://www.rtems.org/license/LICENSE
  */
 
-#ifndef LIBBSP_OR1K_OR1KSIM_H
-#define LIBBSP_OR1K_OR1KSIM_H
+#ifndef LIBBSP_GENERIC_OR1K_H
+#define LIBBSP_GENERIC_OR1K_H
 
 #include <bspopts.h>
 #include <rtems.h>
 #include <rtems/console.h>
 #include <rtems/clockdrv.h>
-#include <bsp/or1ksim.h>
+#include <bsp/generic_or1k.h>
 
 #include <bsp/default-initial-extension.h>
 
@@ -35,13 +35,13 @@ extern "C" {
 }
 #endif /* __cplusplus */
 
-#endif /* LIBBSP_OR1K_OR1KSIM_H */
+#endif /* LIBBSP_GENERIC_OR1K_H */
 
 /**
- * @defgroup or1k_or1ksim support
+ * @defgroup generic_or1k support
  *
  * @ingroup bsp_or1k
  *
- * @brief or1ksim support package
+ * @brief generic_or1k support package
  *
  */
diff --git a/c/src/lib/libbsp/or1k/generic_or1k/include/generic_or1k.h b/c/src/lib/libbsp/or1k/generic_or1k/include/generic_or1k.h
new file mode 100644
index 0000000000..e4d9760640
--- /dev/null
+++ b/c/src/lib/libbsp/or1k/generic_or1k/include/generic_or1k.h
@@ -0,0 +1,118 @@
+/**
+ * @file
+ *
+ * @ingroup generic_or1k_reg
+ *
+ * @brief Register definitions.
+ */
+
+/*
+ * COPYRIGHT (c) 2014-2015 Hesham ALMatary <heshamelmatary@gmail.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE
+ */
+
+#ifndef LIBBSP_GENERIC_OR1K_H
+#define LIBBSP_GENERIC_OR1K_H
+
+#include <stdint.h>
+
+/**
+ * @defgroup generic_or1k_reg Register Definitions
+ *
+ * @ingroup generic_or1k
+ *
+ * @brief Shared register definitions for or1k systems.
+ *
+ * @{
+ */
+
+/**
+ * @name Register Macros
+ *
+ * @{
+ */
+
+ #define OR1K_REG(x)           (*((volatile unsigned char *) (x)))
+ #define OR1K_BIT(n)           (1 << (n))
+
+/** @} */
+
+/**
+ * @name Internal OR1K UART Registers
+ *
+ * @{
+ */
+#define OR1K_BSP_CLOCK_FREQ       50000000UL
+#define OR1K_BSP_UART_BASE        0x90000000
+
+#define OR1K_BSP_UART_REG_TX              (OR1K_BSP_UART_BASE+0)
+#define OR1K_BSP_UART_REG_RX              (OR1K_BSP_UART_BASE+0)
+#define OR1K_BSP_UART_REG_DEV_LATCH_LOW   (OR1K_BSP_UART_BASE+0)
+#define OR1K_BSP_UART_REG_DEV_LATCH_HIGH  (OR1K_BSP_UART_BASE+1)
+#define OR1K_BSP_UART_REG_INT_ENABLE      (OR1K_BSP_UART_BASE+1)
+#define OR1K_BSP_UART_REG_INT_ID          (OR1K_BSP_UART_BASE+2)
+#define OR1K_BSP_UART_REG_FIFO_CTRL       (OR1K_BSP_UART_BASE+2)
+#define OR1K_BSP_UART_REG_LINE_CTRL       (OR1K_BSP_UART_BASE+3)
+#define OR1K_BSP_UART_REG_MODEM_CTRL      (OR1K_BSP_UART_BASE+4)
+#define OR1K_BSP_UART_REG_LINE_STATUS     (OR1K_BSP_UART_BASE+5)
+#define OR1K_BSP_UART_REG_MODEM_STATUS    (OR1K_BSP_UART_BASE+6)
+#define OR1K_BSP_UART_REG_SCRATCH         (OR1K_BSP_UART_BASE+7)
+
+/* FIFO Control Register */
+#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_1    (0x00)
+#define OR1K_BSP_UART_REG_FIFO_CTRL_ENABLE_FIFO  (0x01)
+#define OR1K_BSP_UART_REG_FIFO_CTRL_CLEAR_RCVR   (0x02)
+#define OR1K_BSP_UART_REG_FIFO_CTRL_CLEAR_XMIT   (0x03)
+#define OR1K_BSP_UART_REG_FIFO_CTRL_DMA_SELECT   (0x08)
+#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_4    (0x40)
+#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_8    (0x80)
+#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_14   (0xC0)
+#define OR1K_BSP_UART_REG_FIFO_CTRL_TRIGGER_MASK (0xC0)
+
+/* Line Control Register */
+#define OR1K_BSP_UART_REG_LINE_CTRL_WLEN5  (0x00)
+#define OR1K_BSP_UART_REG_LINE_CTRL_WLEN6  (0x01)
+#define OR1K_BSP_UART_REG_LINE_CTRL_WLEN7  (0x02)
+#define OR1K_BSP_UART_REG_LINE_CTRL_WLEN8  (0x03)
+#define OR1K_BSP_UART_REG_LINE_CTRL_STOP   (0x04)
+#define OR1K_BSP_UART_REG_LINE_CTRL_PARITY (0x08)
+#define OR1K_BSP_UART_REG_LINE_CTRL_EPAR   (0x10)
+#define OR1K_BSP_UART_REG_LINE_CTRL_SPAR   (0x20)
+#define OR1K_BSP_UART_REG_LINE_CTRL_SBC    (0x40)
+#define OR1K_BSP_UART_REG_LINE_CTRL_DLAB   (0x80)
+
+/* Line Status Register */
+#define OR1K_BSP_UART_REG_LINE_STATUS_DR   (0x01)
+#define OR1K_BSP_UART_REG_LINE_STATUS_OE   (0x02)
+#define OR1K_BSP_UART_REG_LINE_STATUS_PE   (0x04)
+#define OR1K_BSP_UART_REG_LINE_STATUS_FE   (0x08)
+#define OR1K_BSP_UART_REG_LINE_STATUS_BI   (0x10)
+#define OR1K_BSP_UART_REG_LINE_STATUS_THRE (0x20)
+#define OR1K_BSP_UART_REG_LINE_STATUS_TEMT (0x40)
+
+/* Modem Control Register */
+#define OR1K_BSP_UART_REG_MODEM_CTRL_DTR  (0x01)
+#define OR1K_BSP_UART_REG_MODEM_CTRL_RTS  (0x02)
+#define OR1K_BSP_UART_REG_MODEM_CTRL_OUT1 (0x04)
+#define OR1K_BSP_UART_REG_MODEM_CTRL_OUT2 (0x08)
+#define OR1K_BSP_UART_REG_MODEM_CTRL_LOOP (0x10)
+
+/* Modem Status Register */
+#define OR1K_BSP_UART_REG_MODEM_STATUS_DCTS (0x01)
+#define OR1K_BSP_UART_REG_MODEM_STATUS_DDSR (0x02)
+#define OR1K_BSP_UART_REG_MODEM_STATUS_TERI (0x04)
+#define OR1K_BSP_UART_REG_MODEM_STATUS_DDCD (0x08)
+#define OR1K_BSP_UART_REG_MODEM_STATUS_CTS  (0x10)
+#define OR1K_BSP_UART_REG_MODEM_STATUS_DSR  (0x20)
+#define OR1K_BSP_UART_REG_MODEM_STATUS_RI   (0x40)
+#define OR1K_BSP_UART_REG_MODEM_STATUS_DCD  (0x80)
+#define OR1K_BSP_UART_REG_MODEM_STATUS_ANY_DELTA (0x0F)
+
+/** @} */
+
+/** @} */
+
+#endif /* LIBBSP_GENERIC_OR1K_H */
diff --git a/c/src/lib/libbsp/or1k/generic_or1k/include/irq.h b/c/src/lib/libbsp/or1k/generic_or1k/include/irq.h
new file mode 100644
index 0000000000..431b250469
--- /dev/null
+++ b/c/src/lib/libbsp/or1k/generic_or1k/include/irq.h
@@ -0,0 +1,45 @@
+/**
+ * @file
+ *
+ * @ingroup OR1K_IRQ
+ *
+ * @brief Interrupt definitions.
+ */
+
+/**
+ * COPYRIGHT (c) 2014-2015 Hesham ALMatary <heshamelmatary@gmail.com>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE
+ */
+
+#ifndef LIBBSP_GENERIC_OR1K_IRQ_H
+#define LIBBSP_GENERIC_OR1K_IRQ_H
+
+#ifndef ASM
+
+#include <rtems.h>
+#include <rtems/irq.h>
+#include <rtems/irq-extension.h>
+
+#define BSP_INTERRUPT_VECTOR_MIN  0x100
+#define BSP_INTERRUPT_VECTOR_MAX  0x1F00
+
+/* Interrupt Identification Register */
+#define OR1K_BSP_UART_REG_INT_ID_MSI    (0x00)
+#define OR1K_BSP_UART_REG_INT_ID_NO_INT (0x01)
+#define OR1K_BSP_UART_REG_INT_ID_THRI   (0x02)
+#define OR1K_BSP_UART_REG_INT_ID_RDI    (0x04)
+#define OR1K_BSP_UART_REG_INT_ID_ID     (0x06)
+#define OR1K_BSP_UART_REG_INT_ID_RLSI   (0x06)
+#define OR1K_BSP_UART_REG_INT_ID_TOI    (0x0c)
+
+/* Interrupt Enable Register */
+#define OR1K_BSP_UART_REG_INT_ENABLE_RDI  (0x01)
+#define OR1K_BSP_UART_REG_INT_ENABLE_THRI (0x02)
+#define OR1K_BSP_UART_REG_INT_ENABLE_RLSI (0x04)
+#define OR1K_BSP_UART_REG_INT_ENABLE_MSI  (0x08)
+
+#endif /* ASM */
+#endif /* LIBBSP_GENEIRC_OR1K_IRQ_H */
diff --git a/c/src/lib/libbsp/or1k/or1ksim/include/uart.h b/c/src/lib/libbsp/or1k/generic_or1k/include/uart.h
index 92ed203844..dbf3bbf9ef 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/include/uart.h
+++ b/c/src/lib/libbsp/or1k/generic_or1k/include/uart.h
@@ -1,13 +1,13 @@
 /**
  * @file
  *
- * @ingroup or1ksim_uart
+ * @ingroup generic_or1k_uart
  *
  * @brief UART support.
  */
 
 /*
- * COPYRIGHT (c) 2014 Hesham ALMatary <heshamelmatary@gmail.com>
+ * COPYRIGHT (c) 2014-2015 Hesham ALMatary <heshamelmatary@gmail.com>
  *
  * The license and distribution terms for this file may be
  * found in the file LICENSE in this distribution or at
@@ -15,15 +15,15 @@
  */
 
 /**
- * @defgroup or1ksim_uart UART Support
+ * @defgroup generic_or1k_uart UART Support
  *
- * @ingroup or1k_or1ksim
+ * @ingroup generic_or1k
  *
  * @brief Universal Asynchronous Receiver/Transmitter (UART) Support
  */
 
-#ifndef LIBBSP_OR1K_OR1KSIM_UART_H
-#define LIBBSP_OR1K_OR1KSIM_UART_H
+#ifndef LIBBSP_GENERIC_OR1K_UART_H
+#define LIBBSP_GENERIC_OR1K_UART_H
 
 #include <libchip/serial.h>
 
@@ -31,12 +31,12 @@
 extern "C" {
 #endif /* __cplusplus */
 
-#define OR1KSIM_UART_DEFAULT_BAUD  115200
-#define OR1KSIM_BSP_UART_IRQ       13
-extern const console_fns or1ksim_uart_fns;
+#define OR1K_UART_DEFAULT_BAUD  115200
+#define OR1K_BSP_UART_IRQ       2
+extern const console_fns generic_or1k_uart_fns;
 
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */
 
-#endif /* LIBBSP_OR1K_OR1KSIM_UART_H */
+#endif /* LIBBSP_GENERIC_OR1K_UART_H */
diff --git a/c/src/lib/libbsp/or1k/or1ksim/irq/irq.c b/c/src/lib/libbsp/or1k/generic_or1k/irq/irq.c
index c3c4d6d4a4..c3c4d6d4a4 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/irq/irq.c
+++ b/c/src/lib/libbsp/or1k/generic_or1k/irq/irq.c
diff --git a/c/src/lib/libbsp/or1k/or1ksim/make/custom/or1ksim-testsuite.tcfg b/c/src/lib/libbsp/or1k/generic_or1k/make/custom/generic_or1k-testsuite.tcfg
index a66c1cd226..b8e4a7a74d 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/make/custom/or1ksim-testsuite.tcfg
+++ b/c/src/lib/libbsp/or1k/generic_or1k/make/custom/generic_or1k-testsuite.tcfg
@@ -1,5 +1,5 @@
 #
-# or1ksim RTEMS Test Database.
+#  generic_or1k RTEMS Test Database.
 #
 
 include: testdata/disable-intrcritical-tests.tcfg
diff --git a/c/src/lib/libbsp/or1k/or1ksim/make/custom/or1ksim.cfg b/c/src/lib/libbsp/or1k/generic_or1k/make/custom/generic_or1k.cfg
index fff00ae83b..fff00ae83b 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/make/custom/or1ksim.cfg
+++ b/c/src/lib/libbsp/or1k/generic_or1k/make/custom/generic_or1k.cfg
diff --git a/c/src/lib/libbsp/or1k/or1ksim/preinstall.am b/c/src/lib/libbsp/or1k/generic_or1k/preinstall.am
index bf4c75e24e..f5522be73d 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/preinstall.am
+++ b/c/src/lib/libbsp/or1k/generic_or1k/preinstall.am
@@ -94,9 +94,9 @@ $(PROJECT_INCLUDE)/bsp/uart.h: include/uart.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/uart.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/uart.h
 
-$(PROJECT_INCLUDE)/bsp/or1ksim.h: include/or1ksim.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/or1ksim.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/or1ksim.h
+$(PROJECT_INCLUDE)/bsp/generic_or1k.h: include/generic_or1k.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/generic_or1k.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/generic_or1k.h
 
 $(PROJECT_INCLUDE)/coverhd.h: ../../shared/include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
diff --git a/c/src/lib/libbsp/or1k/or1ksim/sim.cfg b/c/src/lib/libbsp/or1k/generic_or1k/sim.cfg
index 1032f0d4ce..1032f0d4ce 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/sim.cfg
+++ b/c/src/lib/libbsp/or1k/generic_or1k/sim.cfg
diff --git a/c/src/lib/libbsp/or1k/or1ksim/start/start.S b/c/src/lib/libbsp/or1k/generic_or1k/start/start.S
index 4d911d4a41..d951a552c7 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/start/start.S
+++ b/c/src/lib/libbsp/or1k/generic_or1k/start/start.S
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014 Hesham ALMatary <heshamelmatary@gmail.com>
+ * Copyright (c) 2014-2015 Hesham ALMatary <heshamelmatary@gmail.com>
  *
  *  The license and distribution terms for this file may be
  *  found in the file LICENSE in this distribution or at
diff --git a/c/src/lib/libbsp/or1k/or1ksim/startup/bspstart.c b/c/src/lib/libbsp/or1k/generic_or1k/startup/bspstart.c
index 518c71e850..2bf417a044 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/startup/bspstart.c
+++ b/c/src/lib/libbsp/or1k/generic_or1k/startup/bspstart.c
@@ -1,13 +1,13 @@
 /**
  * @file
  *
- * @ingroup or1ksim
+ * @ingroup generic_or1k
  *
  * @brief Benchmark timer support.
  */
 
 /*
- * Copyright (c) 2014 by Hesham ALMatary
+ * Copyright (c) 2014-2015 by Hesham ALMatary
  *
  *  The license and distribution terms for this file may be
  *  found in the file LICENSE in this distribution or at
diff --git a/c/src/lib/libbsp/or1k/or1ksim/startup/linkcmds b/c/src/lib/libbsp/or1k/generic_or1k/startup/linkcmds
index cef99d36d0..cef99d36d0 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/startup/linkcmds
+++ b/c/src/lib/libbsp/or1k/generic_or1k/startup/linkcmds
diff --git a/c/src/lib/libbsp/or1k/or1ksim/timer/timer.c b/c/src/lib/libbsp/or1k/generic_or1k/timer/timer.c
index e5f3fd6267..872f1af7be 100644
--- a/c/src/lib/libbsp/or1k/or1ksim/timer/timer.c
+++ b/c/src/lib/libbsp/or1k/generic_or1k/timer/timer.c
@@ -1,13 +1,13 @@
 /**
  * @file
  *
- * @ingroup or1ksim
+ * @ingroup generic_or1k
  *
  * @brief Benchmark timer support.
  */
 
 /*
- * Copyright (c) 2014 by Hesham ALMatary
+ * Copyright (c) 2014-2015 by Hesham ALMatary
  *
  *  The license and distribution terms for this file may be
  *  found in the file LICENSE in this distribution or at
@@ -16,10 +16,10 @@
 
 #include <rtems.h>
 #include <rtems/btimer.h>
-#include <bsp/or1ksim.h>
+#include <bsp/generic_or1k.h>
 #include <rtems/score/or1k-utility.h>
 
-#define OR1KSIM_NANOSECONDS_PER_CLK_CYCLE 10
+#define OR1K_NANOSECONDS_PER_CLK_CYCLE 10
 
 static bool benchmark_timer_find_average_overhead = false;
 static uint64_t benchmark_timer_base;
@@ -46,7 +46,7 @@ benchmark_timer_t benchmark_timer_read( void )
   delta = clicks - benchmark_timer_base;
 
   /* total in nanoseconds */
-  total = OR1KSIM_NANOSECONDS_PER_CLK_CYCLE * (delta);
+  total = OR1K_NANOSECONDS_PER_CLK_CYCLE * (delta);
 
   if ( benchmark_timer_find_average_overhead == true )
     return total;          /* in nanoseconds microsecond units */
diff --git a/c/src/lib/libbsp/or1k/or1ksim/include/irq.h b/c/src/lib/libbsp/or1k/or1ksim/include/irq.h
deleted file mode 100644
index be669d84a0..0000000000
--- a/c/src/lib/libbsp/or1k/or1ksim/include/irq.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/**
- * @file
- *
- * @ingroup or1ksim_interrupt
- *
- * @brief Interrupt definitions.
- */
-
-/**
- * COPYRIGHT (c) 2014 Hesham ALMatary <heshamelmatary@gmail.com>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE
- */
-
-#ifndef LIBBSP_OR1K_OR1KSIM_IRQ_H
-#define LIBBSP_OR1K_OR1KSIM_IRQ_H
-
-#ifndef ASM
-
-#include <rtems.h>
-#include <rtems/irq.h>
-#include <rtems/irq-extension.h>
-
-#define BSP_INTERRUPT_VECTOR_MIN  0x100
-#define BSP_INTERRUPT_VECTOR_MAX  0x1F00
-
-/* Interrupt Identification Register */
-#define OR1KSIM_BSP_UART_REG_INT_ID_MSI    (0x00)
-#define OR1KSIM_BSP_UART_REG_INT_ID_NO_INT (0x01)
-#define OR1KSIM_BSP_UART_REG_INT_ID_THRI   (0x02)
-#define OR1KSIM_BSP_UART_REG_INT_ID_RDI    (0x04)
-#define OR1KSIM_BSP_UART_REG_INT_ID_ID     (0x06)
-#define OR1KSIM_BSP_UART_REG_INT_ID_RLSI   (0x06)
-#define OR1KSIM_BSP_UART_REG_INT_ID_TOI    (0x0c)
-
-/* Interrupt Enable Register */
-#define OR1KSIM_BSP_UART_REG_INT_ENABLE_RDI  (0x01)
-#define OR1KSIM_BSP_UART_REG_INT_ENABLE_THRI (0x02)
-#define OR1KSIM_BSP_UART_REG_INT_ENABLE_RLSI (0x04)
-#define OR1KSIM_BSP_UART_REG_INT_ENABLE_MSI  (0x08)
-
-#endif /* ASM */
-#endif /* LIBBSP_OR1K_OR1KSIM_IRQ_H */
diff --git a/c/src/lib/libbsp/or1k/or1ksim/include/or1ksim.h b/c/src/lib/libbsp/or1k/or1ksim/include/or1ksim.h
deleted file mode 100644
index e5354ddcf2..0000000000
--- a/c/src/lib/libbsp/or1k/or1ksim/include/or1ksim.h
+++ /dev/null
@@ -1,118 +0,0 @@
-/**
- * @file
- *
- * @ingroup or1ksim_reg
- *
- * @brief Register definitions.
- */
-
-/*
- * COPYRIGHT (c) 2014 Hesham ALMatary <heshamelmatary@gmail.com>
- *
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE
- */
-
-#ifndef LIBBSP_OR1K_OR1KSIM_H
-#define LIBBSP_OR1K_OR1KSIM_H
-
-#include <stdint.h>
-
-/**
- * @defgroup or1ksim_reg Register Definitions
- *
- * @ingroup or1k_or1ksim
- *
- * @brief Register Definitions
- *
- * @{
- */
-
-/**
- * @name Register Macros
- *
- * @{
- */
-
- #define OR1KSIM_REG(x)           (*((volatile unsigned char *) (x)))
- #define OR1KSIM_BIT(n)           (1 << (n))
-
-/** @} */
-
-/**
- * @name Internal OR1K UART Registers
- *
- * @{
- */
-#define OR1KSIM_BSP_CLOCK_FREQ       50000000UL
-#define OR1KSIM_BSP_UART_BASE        0x90000000
-
-#define OR1KSIM_BSP_UART_REG_TX              (OR1KSIM_BSP_UART_BASE+0)
-#define OR1KSIM_BSP_UART_REG_RX              (OR1KSIM_BSP_UART_BASE+0)
-#define OR1KSIM_BSP_UART_REG_DEV_LATCH_LOW   (OR1KSIM_BSP_UART_BASE+0)
-#define OR1KSIM_BSP_UART_REG_DEV_LATCH_HIGH  (OR1KSIM_BSP_UART_BASE+1)
-#define OR1KSIM_BSP_UART_REG_INT_ENABLE      (OR1KSIM_BSP_UART_BASE+1)
-#define OR1KSIM_BSP_UART_REG_INT_ID          (OR1KSIM_BSP_UART_BASE+2)
-#define OR1KSIM_BSP_UART_REG_FIFO_CTRL       (OR1KSIM_BSP_UART_BASE+2)
-#define OR1KSIM_BSP_UART_REG_LINE_CTRL       (OR1KSIM_BSP_UART_BASE+3)
-#define OR1KSIM_BSP_UART_REG_MODEM_CTRL      (OR1KSIM_BSP_UART_BASE+4)
-#define OR1KSIM_BSP_UART_REG_LINE_STATUS     (OR1KSIM_BSP_UART_BASE+5)
-#define OR1KSIM_BSP_UART_REG_MODEM_STATUS    (OR1KSIM_BSP_UART_BASE+6)
-#define OR1KSIM_BSP_UART_REG_SCRATCH         (OR1KSIM_BSP_UART_BASE+7)
-
-/* FIFO Control Register */
-#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_TRIGGER_1    (0x00)
-#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_ENABLE_FIFO  (0x01)
-#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_CLEAR_RCVR   (0x02)
-#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_CLEAR_XMIT   (0x03)
-#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_DMA_SELECT   (0x08)
-#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_TRIGGER_4    (0x40)
-#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_TRIGGER_8    (0x80)
-#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_TRIGGER_14   (0xC0)
-#define OR1KSIM_BSP_UART_REG_FIFO_CTRL_TRIGGER_MASK (0xC0)
-
-/* Line Control Register */
-#define OR1KSIM_BSP_UART_REG_LINE_CTRL_WLEN5  (0x00)
-#define OR1KSIM_BSP_UART_REG_LINE_CTRL_WLEN6  (0x01)
-#define OR1KSIM_BSP_UART_REG_LINE_CTRL_WLEN7  (0x02)
-#define OR1KSIM_BSP_UART_REG_LINE_CTRL_WLEN8  (0x03)
-#define OR1KSIM_BSP_UART_REG_LINE_CTRL_STOP   (0x04)
-#define OR1KSIM_BSP_UART_REG_LINE_CTRL_PARITY (0x08)
-#define OR1KSIM_BSP_UART_REG_LINE_CTRL_EPAR   (0x10)
-#define OR1KSIM_BSP_UART_REG_LINE_CTRL_SPAR   (0x20)
-#define OR1KSIM_BSP_UART_REG_LINE_CTRL_SBC    (0x40)
-#define OR1KSIM_BSP_UART_REG_LINE_CTRL_DLAB   (0x80)
-
-/* Line Status Register */
-#define OR1KSIM_BSP_UART_REG_LINE_STATUS_DR   (0x01)
-#define OR1KSIM_BSP_UART_REG_LINE_STATUS_OE   (0x02)
-#define OR1KSIM_BSP_UART_REG_LINE_STATUS_PE   (0x04)
-#define OR1KSIM_BSP_UART_REG_LINE_STATUS_FE   (0x08)
-#define OR1KSIM_BSP_UART_REG_LINE_STATUS_BI   (0x10)
-#define OR1KSIM_BSP_UART_REG_LINE_STATUS_THRE (0x20)
-#define OR1KSIM_BSP_UART_REG_LINE_STATUS_TEMT (0x40)
-
-/* Modem Control Register */
-#define OR1KSIM_BSP_UART_REG_MODEM_CTRL_DTR  (0x01)
-#define OR1KSIM_BSP_UART_REG_MODEM_CTRL_RTS  (0x02)
-#define OR1KSIM_BSP_UART_REG_MODEM_CTRL_OUT1 (0x04)
-#define OR1KSIM_BSP_UART_REG_MODEM_CTRL_OUT2 (0x08)
-#define OR1KSIM_BSP_UART_REG_MODEM_CTRL_LOOP (0x10)
-
-/* Modem Status Register */
-#define OR1KSIM_BSP_UART_REG_MODEM_STATUS_DCTS (0x01)
-#define OR1KSIM_BSP_UART_REG_MODEM_STATUS_DDSR (0x02)
-#define OR1KSIM_BSP_UART_REG_MODEM_STATUS_TERI (0x04)
-#define OR1KSIM_BSP_UART_REG_MODEM_STATUS_DDCD (0x08)
-#define OR1KSIM_BSP_UART_REG_MODEM_STATUS_CTS  (0x10)
-#define OR1KSIM_BSP_UART_REG_MODEM_STATUS_DSR  (0x20)
-#define OR1KSIM_BSP_UART_REG_MODEM_STATUS_RI   (0x40)
-#define OR1KSIM_BSP_UART_REG_MODEM_STATUS_DCD  (0x80)
-#define OR1KSIM_BSP_UART_REG_MODEM_STATUS_ANY_DELTA (0x0F)
-
-/** @} */
-
-/** @} */
-
-#endif /* LIBBSP_OR1K_OR1KSIM_H */