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| author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-10-30 14:30:08 +0000 |
|---|---|---|
| committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-10-30 14:30:08 +0000 |
| commit | 37b2f343a24e55b6cd6828567061f512b5e4278d (patch) | |
| tree | 971ad502fcafe4c2f87172b10146a7783b128e0c | |
| parent | 2001-10-30 Joel Sherrill <joel@OARcorp.com> (diff) | |
| download | rtems-37b2f343a24e55b6cd6828567061f512b5e4278d.tar.bz2 | |
2001-10-30 Joel Sherrill <joel@OARcorp.com>
* start/start.S: Use __mcpu32__ instead of mcpu32 and change sense
of conditional so cpu32 does not attempt to use 68000 style
interrupt vectoring.
| -rw-r--r-- | c/src/lib/libbsp/m68k/sim68000/ChangeLog | 6 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/sim68000/start/start.S | 2 |
2 files changed, 7 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/m68k/sim68000/ChangeLog b/c/src/lib/libbsp/m68k/sim68000/ChangeLog index 446808644f..fb9875a306 100644 --- a/c/src/lib/libbsp/m68k/sim68000/ChangeLog +++ b/c/src/lib/libbsp/m68k/sim68000/ChangeLog @@ -1,3 +1,9 @@ +2001-10-30 Joel Sherrill <joel@OARcorp.com> + + * start/start.S: Use __mcpu32__ instead of mcpu32 and change sense + of conditional so cpu32 does not attempt to use 68000 style + interrupt vectoring. + 2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de> * .cvsignore: Add autom4te.cache for autoconf > 2.52. diff --git a/c/src/lib/libbsp/m68k/sim68000/start/start.S b/c/src/lib/libbsp/m68k/sim68000/start/start.S index 805ce93218..132d2cc38a 100644 --- a/c/src/lib/libbsp/m68k/sim68000/start/start.S +++ b/c/src/lib/libbsp/m68k/sim68000/start/start.S @@ -55,7 +55,7 @@ V____IPC: .long start - V___ISSP | Lots of macros, how-ever it creates a simple ROM vector table | -#if !defined(mcpu32) +#if defined(__mcpu32__) .space 1016 | reserve space for rest of vectors #else #define MAKE_EXCEPTION_VECTOR(n) V___##n: .long (_CPU_ISR_jump_table + (n * 10)) |