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authorSebastian Huber <sebastian.huber@embedded-brains.de>2015-09-01 09:42:46 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2015-09-01 10:00:13 +0200
commit35e0394165657495d4ee19fccdf46c0cebbbf2d3 (patch)
treec75e30541e0a8d7ca264fc43514965d879510195
parent9ccdb1dfdec1942af73af44670757a2aa422d69a (diff)
downloadrtems-35e0394165657495d4ee19fccdf46c0cebbbf2d3.tar.bz2
arm: Use compiler memory barrier by default
-rw-r--r--cpukit/score/cpu/arm/rtems/score/cpu.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h
index 6aced79b3b..6ed6ef9a1f 100644
--- a/cpukit/score/cpu/arm/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/rtems/score/cpu.h
@@ -8,7 +8,7 @@
* This include file contains information pertaining to the ARM
* processor.
*
- * Copyright (c) 2009-2014 embedded brains GmbH.
+ * Copyright (c) 2009-2015 embedded brains GmbH.
*
* Copyright (c) 2007 Ray Xu <Rayx.cn@gmail.com>
*
@@ -301,6 +301,8 @@ static inline void _ARM_Data_memory_barrier( void )
{
#ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
__asm__ volatile ( "dmb" : : : "memory" );
+#else
+ RTEMS_COMPILER_MEMORY_BARRIER();
#endif
}
@@ -308,6 +310,8 @@ static inline void _ARM_Data_synchronization_barrier( void )
{
#ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
__asm__ volatile ( "dsb" : : : "memory" );
+#else
+ RTEMS_COMPILER_MEMORY_BARRIER();
#endif
}
@@ -315,6 +319,8 @@ static inline void _ARM_Instruction_synchronization_barrier( void )
{
#ifdef ARM_MULTILIB_HAS_BARRIER_INSTRUCTIONS
__asm__ volatile ( "isb" : : : "memory" );
+#else
+ RTEMS_COMPILER_MEMORY_BARRIER();
#endif
}