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authorJoel Sherrill <joel.sherrill@OARcorp.com>1996-05-24 20:34:49 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1996-05-24 20:34:49 +0000
commit28fa54d9b9e30d782115d65456e4cd3d8b8fb6f2 (patch)
tree9b39581aa6c666641d5566f60c5592e15e3ab741
parentchanged joel's email address (diff)
downloadrtems-28fa54d9b9e30d782115d65456e4cd3d8b8fb6f2.tar.bz2
added Motorola MVME147 BSP submitted by Dominique le Campion
(Dominique.LECAMPION@enst-bretagne.fr), for Telecom Bretagne and T.N.I. (Brest, France)
-rw-r--r--c/src/lib/libbsp/m68k/mvme147/README86
-rw-r--r--c/src/lib/libbsp/m68k/mvme147/clock/ckinit.c142
-rw-r--r--c/src/lib/libbsp/m68k/mvme147/console/console.c258
-rw-r--r--c/src/lib/libbsp/m68k/mvme147/include/bsp.h189
-rw-r--r--c/src/lib/libbsp/m68k/mvme147/include/coverhd.h104
-rw-r--r--c/src/lib/libbsp/m68k/mvme147/startup/bspclean.c45
-rw-r--r--c/src/lib/libbsp/m68k/mvme147/startup/bspstart.c245
-rw-r--r--c/src/lib/libbsp/m68k/mvme147/startup/linkcmds52
-rw-r--r--c/src/lib/libbsp/m68k/mvme147/timer/timer.c84
-rw-r--r--c/src/lib/libbsp/m68k/mvme147/timer/timerisr.s28
-rw-r--r--c/src/lib/libbsp/m68k/mvme147/times194
11 files changed, 1427 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/m68k/mvme147/README b/c/src/lib/libbsp/m68k/mvme147/README
new file mode 100644
index 0000000000..b7952ad9cb
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147/README
@@ -0,0 +1,86 @@
+#
+# $Id$
+#
+
+Notes about the MVME147 bsp
+
+MVME147 port for TNI - Telecom Bretagne
+by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+May 1996
+
+
+This bsp is essentially based on the mvme136 bsp.
+
+Summary of the modifications that were made:
+
+ * include
+
+ - bsp.h
+ Peripheral Channel Controller memory mapping
+ Z8530 memory mapping
+
+ * startup
+
+ - bspstart.c
+ main () setup for VME roundrobin mode
+ setup for the PCC interrupt vector base
+ - bspclean.c
+ bsp_cleanup () disable timer 1 & 2 interruptions
+ - linkcmds set the RAM start (0x5000) and size (4Meg - 0x5000)
+ - setvec.c unchanged
+ - sbrk.c unchanged
+
+ * console
+
+ - console.c taken from the dmv152 bsp (Zilog Z8530)
+ with no modification
+
+ * clock
+
+ - ckinit.c entirely rewritten for the PCC tick timer 2
+
+ * timer
+
+ - timerisr.s and timer.c
+ entirely rewritten for the PCC tick timer 1
+ now gives results un 6.25 us units (mininum timer delay,
+ suprising big grain)
+
+ * times
+
+ - updated results for the mvme147 (beware of the 6.25 us grain)
+
+ * Makefiles
+
+ - compilation of shmsupp simply removed
+
+
+To be done:
+
+ * add VMEchip memory mapping to include/bsp.h
+
+ * update the overheads in coverhead.h
+
+ * add support for serila ports 2,3 and 4.
+
+Other notes:
+
+ * There is no MP support (no more shmsupp) because I have no
+ experience of the VME bus. The mvme136 shared memory support
+ does not seem applicable on the VMEchip of the mvme147, so
+ I don't know where to start. Suggestions are welcome.
+
+ * All the timing tests and sp tests have been run except tmoverhd.
+ The test hangs during the pause (where the task should be suspended
+ until a return). Maybe the rtems_initialize_executive is no more
+ reentrant with this bsp.
+
+Future work:
+
+ * Add gdb serial remote support.
+
+ * Shared memory support (I don't really need it, but I can do
+ it if it's simple).
+
+ * Message passing on VME bus, with Ada 95 annex E (distributed
+ systems) in mind.
diff --git a/c/src/lib/libbsp/m68k/mvme147/clock/ckinit.c b/c/src/lib/libbsp/m68k/mvme147/clock/ckinit.c
new file mode 100644
index 0000000000..d7fd5ddff2
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147/clock/ckinit.c
@@ -0,0 +1,142 @@
+/* Clock_init()
+ *
+ * This routine initializes the Tick Timer 2 on the MVME147 board.
+ * The tick frequency is 1 millisecond.
+ *
+ * Input parameters: NONE
+ *
+ * Output parameters: NONE
+ *
+ * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ * On-Line Applications Research Corporation (OAR).
+ * All rights assigned to U.S. Government, 1994.
+ *
+ * This material may be reproduced by or for the U.S. Government pursuant
+ * to the copyright license under the clause at DFARS 252.227-7013. This
+ * notice must appear in all copies of this file and its derivatives.
+ *
+ * MVME147 port for TNI - Telecom Bretagne
+ * by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+ * May 1996
+ *
+ * $Id$
+ */
+
+#include <stdlib.h>
+
+#include <bsp.h>
+#include <rtems/libio.h>
+
+#define MS_COUNT 65376 /* 1ms */
+/* MS_COUNT = 0x10000 - 1e-3/6.25e-6 */
+#define CLOCK_INT_LEVEL 6 /* T2's interrupt level */
+
+rtems_unsigned32 Clock_isrs; /* ISRs until next tick */
+volatile rtems_unsigned32 Clock_driver_ticks; /* ticks since initialization */
+rtems_isr_entry Old_ticker;
+
+void Clock_exit( void );
+
+/*
+ * These are set by clock driver during its init
+ */
+
+rtems_device_major_number rtems_clock_major = ~0;
+rtems_device_minor_number rtems_clock_minor;
+
+
+/*
+ * ISR Handler
+ */
+
+rtems_isr Clock_isr(rtems_vector_number vector)
+{
+ Clock_driver_ticks += 1;
+ pcc->timer2_int_control |= 0x80; /* Acknowledge interr. */
+
+ if (Clock_isrs == 1) {
+ rtems_clock_tick();
+ Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
+ }
+ else
+ Clock_isrs -= 1;
+}
+
+void Install_clock(rtems_isr_entry clock_isr )
+{
+
+ Clock_driver_ticks = 0;
+ Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
+
+ if ( BSP_Configuration.ticks_per_timeslice ) {
+ Old_ticker =
+ (rtems_isr_entry) set_vector( clock_isr, TIMER_2_VECTOR, 1 );
+
+ pcc->timer2_int_control = 0x00; /* Disable T2 Interr. */
+ pcc->timer2_preload = MS_COUNT;
+ /* write preload value */
+ pcc->timer2_control = 0x07; /* clear T2 overflow counter, enable counter */
+ pcc->timer2_int_control = CLOCK_INT_LEVEL|0x08;
+ /* Enable Timer 2 and set its int. level */
+
+ atexit( Clock_exit );
+ }
+}
+
+void Clock_exit( void )
+{
+ if ( BSP_Configuration.ticks_per_timeslice ) {
+ pcc->timer2_int_control = 0x00; /* Disable T2 Interr. */
+ }
+}
+
+rtems_device_driver Clock_initialize(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void *pargp
+)
+{
+ Install_clock( Clock_isr );
+
+ /*
+ * make major/minor avail to others such as shared memory driver
+ */
+
+ rtems_clock_major = major;
+ rtems_clock_minor = minor;
+
+ return RTEMS_SUCCESSFUL;
+}
+
+rtems_device_driver Clock_control(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void *pargp
+)
+{
+ rtems_unsigned32 isrlevel;
+ rtems_libio_ioctl_args_t *args = pargp;
+
+ if (args == 0)
+ goto done;
+
+ /*
+ * This is hokey, but until we get a defined interface
+ * to do this, it will just be this simple...
+ */
+
+ if (args->command == rtems_build_name('I', 'S', 'R', ' '))
+ {
+ Clock_isr(TIMER_2_VECTOR);
+ }
+ else if (args->command == rtems_build_name('N', 'E', 'W', ' '))
+ {
+ rtems_interrupt_disable( isrlevel );
+ (void) set_vector( args->buffer, TIMER_2_VECTOR, 1 );
+ rtems_interrupt_enable( isrlevel );
+ }
+
+done:
+ return RTEMS_SUCCESSFUL;
+}
+
diff --git a/c/src/lib/libbsp/m68k/mvme147/console/console.c b/c/src/lib/libbsp/m68k/mvme147/console/console.c
new file mode 100644
index 0000000000..ea21139251
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147/console/console.c
@@ -0,0 +1,258 @@
+/*
+ * This file contains the MVME147 console IO package.
+ *
+ * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ * On-Line Applications Research Corporation (OAR).
+ * All rights assigned to U.S. Government, 1994.
+ *
+ * This material may be reproduced by or for the U.S. Government pursuant
+ * to the copyright license under the clause at DFARS 252.227-7013. This
+ * notice must appear in all copies of this file and its derivatives.
+ *
+ * MVME147 port for TNI - Telecom Bretagne
+ * by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+ * May 1996
+ *
+ * This file was taken from the DMV152 bsp
+ *
+ * $Id$
+ */
+
+#define M147_INIT
+
+#include <bsp.h>
+#include <rtems/libio.h>
+#include <z8530.h>
+
+
+/* console_initialize
+ *
+ * This routine initializes the console IO driver.
+ *
+ * Input parameters: NONE
+ *
+ * Output parameters: NONE
+ *
+ * Return values:
+ */
+
+rtems_device_driver console_initialize(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void *arg
+)
+{
+ rtems_status_code status;
+
+ status = rtems_io_register_name(
+ "/dev/console",
+ major,
+ (rtems_device_minor_number) 0
+ );
+
+ if (status != RTEMS_SUCCESSFUL)
+ rtems_fatal_error_occurred(status);
+
+ return RTEMS_SUCCESSFUL;
+}
+
+/* is_character_ready
+ *
+ * This routine returns TRUE if a character is available.
+ *
+ * Input parameters: NONE
+ *
+ * Output parameters: NONE
+ *
+ * Return values:
+ */
+
+rtems_boolean is_character_ready(
+ char *ch
+)
+{
+ rtems_unsigned8 rr_0;
+
+ for ( ; ; ) {
+ Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
+ if ( !(rr_0 & RR_0_RX_DATA_AVAILABLE) )
+ return( FALSE );
+
+ Z8x30_READ_DATA( CONSOLE_DATA, *ch );
+ return( TRUE );
+ }
+}
+
+/* inbyte
+ *
+ * This routine reads a character from the SCC.
+ *
+ * Input parameters: NONE
+ *
+ * Output parameters: NONE
+ *
+ * Return values:
+ * character read from SCC
+ */
+
+char inbyte( void )
+{
+ rtems_unsigned8 rr_0;
+ char ch;
+
+ for ( ; ; ) {
+ Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
+ if ( (rr_0 & RR_0_RX_DATA_AVAILABLE) != 0 )
+ break;
+ }
+
+ Z8x30_READ_DATA( CONSOLE_DATA, ch );
+ return ( ch );
+}
+
+/* outbyte
+ *
+ * This routine transmits a character out the SCC. It supports
+ * XON/XOFF flow control.
+ *
+ * Input parameters:
+ * ch - character to be transmitted
+ *
+ * Output parameters: NONE
+ */
+
+void outbyte(
+ char ch
+)
+{
+ rtems_unsigned8 rr_0;
+ char flow_control;
+
+ for ( ; ; ) {
+ Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
+ if ( (rr_0 & RR_0_TX_BUFFER_EMPTY) != 0 )
+ break;
+ }
+
+ for ( ; ; ) {
+ Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
+ if ( (rr_0 & RR_0_RX_DATA_AVAILABLE) == 0 )
+ break;
+
+ Z8x30_READ_DATA( CONSOLE_DATA, flow_control );
+
+ if ( flow_control == XOFF )
+ do {
+ do {
+ Z8x30_READ_CONTROL( CONSOLE_CONTROL, RR_0, rr_0 );
+ } while ( (rr_0 & RR_0_RX_DATA_AVAILABLE) == 0 );
+ Z8x30_READ_DATA( CONSOLE_DATA, flow_control );
+ } while ( flow_control != XON );
+ }
+
+ Z8x30_WRITE_DATA( CONSOLE_DATA, ch );
+}
+
+/*
+ * Open entry point
+ */
+
+rtems_device_driver console_open(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void * arg
+)
+{
+ return RTEMS_SUCCESSFUL;
+}
+
+/*
+ * Close entry point
+ */
+
+rtems_device_driver console_close(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void * arg
+)
+{
+ return RTEMS_SUCCESSFUL;
+}
+
+/*
+ * read bytes from the serial port. We only have stdin.
+ */
+
+rtems_device_driver console_read(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void * arg
+)
+{
+ rtems_libio_rw_args_t *rw_args;
+ char *buffer;
+ int maximum;
+ int count = 0;
+
+ rw_args = (rtems_libio_rw_args_t *) arg;
+
+ buffer = rw_args->buffer;
+ maximum = rw_args->count;
+
+ for (count = 0; count < maximum; count++) {
+ buffer[ count ] = inbyte();
+ if (buffer[ count ] == '\n' || buffer[ count ] == '\r') {
+ buffer[ count++ ] = '\n';
+ buffer[ count ] = 0;
+ break;
+ }
+ }
+
+ rw_args->bytes_moved = count;
+ return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED;
+}
+
+/*
+ * write bytes to the serial port. Stdout and stderr are the same.
+ */
+
+rtems_device_driver console_write(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void * arg
+)
+{
+ int count;
+ int maximum;
+ rtems_libio_rw_args_t *rw_args;
+ char *buffer;
+
+ rw_args = (rtems_libio_rw_args_t *) arg;
+
+ buffer = rw_args->buffer;
+ maximum = rw_args->count;
+
+ for (count = 0; count < maximum; count++) {
+ if ( buffer[ count ] == '\n') {
+ outbyte('\r');
+ }
+ outbyte( buffer[ count ] );
+ }
+
+ rw_args->bytes_moved = maximum;
+ return 0;
+}
+
+/*
+ * IO Control entry point
+ */
+
+rtems_device_driver console_control(
+ rtems_device_major_number major,
+ rtems_device_minor_number minor,
+ void * arg
+)
+{
+ return RTEMS_SUCCESSFUL;
+}
+
diff --git a/c/src/lib/libbsp/m68k/mvme147/include/bsp.h b/c/src/lib/libbsp/m68k/mvme147/include/bsp.h
new file mode 100644
index 0000000000..76bea01968
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147/include/bsp.h
@@ -0,0 +1,189 @@
+/* bsp.h
+ *
+ * This include file contains all MVME147 board IO definitions.
+ *
+ * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ * On-Line Applications Research Corporation (OAR).
+ * All rights assigned to U.S. Government, 1994.
+ *
+ * This material may be reproduced by or for the U.S. Government pursuant
+ * to the copyright license under the clause at DFARS 252.227-7013. This
+ * notice must appear in all copies of this file and its derivatives.
+ *
+ * MVME147 port for TNI - Telecom Bretagne
+ * by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+ * May 1996
+ *
+ * $Id$
+ */
+
+#ifndef __MVME147_h
+#define __MVME147_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rtems.h>
+#include <clockdrv.h>
+#include <console.h>
+#include <iosupp.h>
+
+/* Constants */
+
+#define RAM_START 0x00005000
+#define RAM_END 0x00400000
+
+ /* MVME 147 Peripheral controller chip
+ see MVME147/D1, 3.4 */
+
+struct pcc_map {
+ /* 32 bit registers */
+ rtems_unsigned32 dma_table_address; /* 0xfffe1000 */
+ rtems_unsigned32 dma_data_address; /* 0xfffe1004 */
+ rtems_unsigned32 dma_bytecount; /* 0xfffe1008 */
+ rtems_unsigned32 dma_data_holding; /* 0xfffe100c */
+
+ /* 16 bit registers */
+ rtems_unsigned16 timer1_preload; /* 0xfffe1010 */
+ rtems_unsigned16 timer1_count; /* 0xfffe1012 */
+ rtems_unsigned16 timer2_preload; /* 0xfffe1014 */
+ rtems_unsigned16 timer2_count; /* 0xfffe1016 */
+
+ /* 8 bit registers */
+ rtems_unsigned8 timer1_int_control; /* 0xfffe1018 */
+ rtems_unsigned8 timer1_control; /* 0xfffe1019 */
+ rtems_unsigned8 timer2_int_control; /* 0xfffe101a */
+ rtems_unsigned8 timer2_control; /* 0xfffe101b */
+
+ rtems_unsigned8 acfail_int_control; /* 0xfffe101c */
+ rtems_unsigned8 watchdog_control; /* 0xfffe101d */
+
+ rtems_unsigned8 printer_int_control; /* 0xfffe101e */
+ rtems_unsigned8 printer_control; /* 0xfffe102f */
+
+ rtems_unsigned8 dma_int_control; /* 0xfffe1020 */
+ rtems_unsigned8 dma_control; /* 0xfffe1021 */
+ rtems_unsigned8 bus_error_int_control; /* 0xfffe1022 */
+ rtems_unsigned8 dma_status; /* 0xfffe1023 */
+ rtems_unsigned8 abort_int_control; /* 0xfffe1024 */
+ rtems_unsigned8 table_address_function_code; /* 0xfffe1025 */
+ rtems_unsigned8 serial_port_int_control; /* 0xfffe1026 */
+ rtems_unsigned8 general_purpose_control; /* 0xfffe1027 */
+ rtems_unsigned8 lan_int_control; /* 0xfffe1028 */
+ rtems_unsigned8 general_purpose_status; /* 0xfffe1029 */
+ rtems_unsigned8 scsi_port_int_control; /* 0xfffe102a */
+ rtems_unsigned8 slave_base_address; /* 0xfffe102b */
+ rtems_unsigned8 software_int_1_control; /* 0xfffe102c */
+ rtems_unsigned8 int_base_vector; /* 0xfffe102d */
+ rtems_unsigned8 software_int_2_control; /* 0xfffe102e */
+ rtems_unsigned8 revision_level; /* 0xfffe102f */
+};
+
+#define pcc ((volatile struct pcc_map * const) 0xfffe1000)
+
+#define z8530 0xfffe3001
+
+
+/* interrupt vectors - see MVME146/D1 4.14 */
+#define PCC_BASE_VECTOR 0x40 /* First user int */
+#define SCC_VECTOR PCC_BASE_VECTOR+3
+#define TIMER_1_VECTOR PCC_BASE_VECTOR+8
+#define TIMER_2_VECTOR PCC_BASE_VECTOR+9
+#define SOFT_1_VECTOR PCC_BASE_VECTOR+10
+#define SOFT_2_VECTOR PCC_BASE_VECTOR+11
+
+#define USE_CHANNEL_A 1 /* 1 = use channel A for console */
+#define USE_CHANNEL_B 0 /* 1 = use channel B for console */
+
+#if (USE_CHANNEL_A == 1)
+#define CONSOLE_CONTROL 0xfffe3002
+#define CONSOLE_DATA 0xfffe3003
+#elif (USE_CHANNEL_B == 1)
+#define CONSOLE_CONTROL 0xfffe3000
+#define CONSOLE_DATA 0xfffe3001
+#endif
+
+
+
+#define FOREVER 1 /* infinite loop */
+
+#ifdef M147_INIT
+#undef EXTERN
+#define EXTERN
+#else
+#undef EXTERN
+#define EXTERN extern
+#endif
+
+/*
+ * Define the time limits for RTEMS Test Suite test durations.
+ * Long test and short test duration limits are provided. These
+ * values are in seconds and need to be converted to ticks for the
+ * application.
+ *
+ */
+
+#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */
+#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */
+
+/*
+ * Define the interrupt mechanism for Time Test 27
+ *
+ * NOTE: Use the MPCSR vector for the MVME147
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 0
+
+#define Install_tm27_vector( handler ) set_vector( (handler), \
+ SOFT_1_VECTOR, 1 )
+
+#define Cause_tm27_intr() pcc->software_int_1_control = 0x0c
+ /* generate level 4 sotware int. */
+
+#define Clear_tm27_intr() pcc->software_int_1_control = 0x00
+
+#define Lower_tm27_intr()
+
+
+/* miscellaneous stuff assumed to exist */
+
+extern rtems_configuration_table BSP_Configuration;
+
+extern m68k_isr_entry M68Kvec[]; /* vector table address */
+
+/*
+ * Device Driver Table Entries
+ */
+
+/*
+ * NOTE: Use the standard Console driver entry
+ */
+
+/*
+ * NOTE: Use the standard Clock driver entry
+ */
+
+/*
+ * How many libio files we want
+ */
+
+#define BSP_LIBIO_MAX_FDS 20
+
+/* functions */
+
+void bsp_cleanup( void );
+
+m68k_isr_entry set_vector(
+ rtems_isr_entry handler,
+ rtems_vector_number vector,
+ int type
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
+
diff --git a/c/src/lib/libbsp/m68k/mvme147/include/coverhd.h b/c/src/lib/libbsp/m68k/mvme147/include/coverhd.h
new file mode 100644
index 0000000000..7497514e97
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147/include/coverhd.h
@@ -0,0 +1,104 @@
+/* coverhd.h
+ *
+ * This include file has defines to represent the overhead associated
+ * with calling a particular directive from C on this target.
+ *
+ * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ * On-Line Applications Research Corporation (OAR).
+ * All rights assigned to U.S. Government, 1994.
+ *
+ * This material may be reproduced by or for the U.S. Government pursuant
+ * to the copyright license under the clause at DFARS 252.227-7013. This
+ * notice must appear in all copies of this file and its derivatives.
+ *
+ * $Id$
+ */
+
+#ifndef __COVERHD_h
+#define __COVERHD_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 2
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 1
+#define CALLING_OVERHEAD_TASK_CREATE 3
+#define CALLING_OVERHEAD_TASK_IDENT 2
+#define CALLING_OVERHEAD_TASK_START 2
+#define CALLING_OVERHEAD_TASK_RESTART 2
+#define CALLING_OVERHEAD_TASK_DELETE 1
+#define CALLING_OVERHEAD_TASK_SUSPEND 1
+#define CALLING_OVERHEAD_TASK_RESUME 2
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY 2
+#define CALLING_OVERHEAD_TASK_MODE 2
+#define CALLING_OVERHEAD_TASK_GET_NOTE 2
+#define CALLING_OVERHEAD_TASK_SET_NOTE 2
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN 4
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER 1
+#define CALLING_OVERHEAD_INTERRUPT_CATCH 2
+#define CALLING_OVERHEAD_CLOCK_GET 5
+#define CALLING_OVERHEAD_CLOCK_SET 4
+#define CALLING_OVERHEAD_CLOCK_TICK 1
+
+#define CALLING_OVERHEAD_TIMER_CREATE 2
+#define CALLING_OVERHEAD_TIMER_IDENT 1
+#define CALLING_OVERHEAD_TIMER_DELETE 2
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 2
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 5
+#define CALLING_OVERHEAD_TIMER_RESET 1
+#define CALLING_OVERHEAD_TIMER_CANCEL 1
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE 3
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE 1
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT 2
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 2
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 3
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 2
+
+#define CALLING_OVERHEAD_EVENT_SEND 2
+#define CALLING_OVERHEAD_EVENT_RECEIVE 2
+#define CALLING_OVERHEAD_SIGNAL_CATCH 2
+#define CALLING_OVERHEAD_SIGNAL_SEND 2
+#define CALLING_OVERHEAD_PARTITION_CREATE 3
+#define CALLING_OVERHEAD_PARTITION_IDENT 2
+#define CALLING_OVERHEAD_PARTITION_DELETE 1
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 2
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 2
+#define CALLING_OVERHEAD_REGION_CREATE 3
+#define CALLING_OVERHEAD_REGION_IDENT 2
+#define CALLING_OVERHEAD_REGION_DELETE 2
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT 3
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 2
+#define CALLING_OVERHEAD_PORT_CREATE 3
+#define CALLING_OVERHEAD_PORT_IDENT 2
+#define CALLING_OVERHEAD_PORT_DELETE 1
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 2
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 2
+
+#define CALLING_OVERHEAD_IO_INITIALIZE 2
+#define CALLING_OVERHEAD_IO_OPEN 2
+#define CALLING_OVERHEAD_IO_CLOSE 3
+#define CALLING_OVERHEAD_IO_READ 2
+#define CALLING_OVERHEAD_IO_WRITE 2
+#define CALLING_OVERHEAD_IO_CONTROL 2
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 2
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 2
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 2
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 1
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
diff --git a/c/src/lib/libbsp/m68k/mvme147/startup/bspclean.c b/c/src/lib/libbsp/m68k/mvme147/startup/bspclean.c
new file mode 100644
index 0000000000..da6e0418dd
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147/startup/bspclean.c
@@ -0,0 +1,45 @@
+/*
+ * This routine returns control to 147Bug.
+ *
+ * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ * On-Line Applications Research Corporation (OAR).
+ * All rights assigned to U.S. Government, 1994.
+ *
+ * This material may be reproduced by or for the U.S. Government pursuant
+ * to the copyright license under the clause at DFARS 252.227-7013. This
+ * notice must appear in all copies of this file and its derivatives.
+ *
+ * MVME147 port for TNI - Telecom Bretagne
+ * by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+ * May 1996
+ *
+ * $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <clockdrv.h>
+
+void bsp_return_to_monitor_trap()
+{
+ extern void start( void );
+
+ register volatile void *start_addr;
+
+ m68k_set_vbr( 0 ); /* restore 147Bug vectors */
+ asm volatile( "trap #15" ); /* trap to 147Bug */
+ asm volatile( ".short 0x63" ); /* return to 147Bug (.RETURN) */
+ /* restart program */
+ start_addr = start;
+
+ asm volatile ( "jmp %0@" : "=a" (start_addr) : "0" (start_addr) );
+}
+
+void bsp_cleanup( void )
+{
+ pcc->timer1_int_control = 0; /* Disable Timer 1 */
+ pcc->timer2_int_control = 0; /* Disable Timer 2 */
+
+ M68Kvec[ 45 ] = bsp_return_to_monitor_trap; /* install handler */
+ asm volatile( "trap #13" ); /* insures SUPV mode */
+}
diff --git a/c/src/lib/libbsp/m68k/mvme147/startup/bspstart.c b/c/src/lib/libbsp/m68k/mvme147/startup/bspstart.c
new file mode 100644
index 0000000000..826d4075f8
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147/startup/bspstart.c
@@ -0,0 +1,245 @@
+/* bsp_start()
+ *
+ * This routine starts the application. It includes application,
+ * board, and monitor specific initialization and configuration.
+ * The generic CPU dependent initialization has been performed
+ * before this routine is invoked.
+ *
+ * INPUT: NONE
+ *
+ * OUTPUT: NONE
+ *
+ * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ * On-Line Applications Research Corporation (OAR).
+ * All rights assigned to U.S. Government, 1994.
+ *
+ * This material may be reproduced by or for the U.S. Government pursuant
+ * to the copyright license under the clause at DFARS 252.227-7013. This
+ * notice must appear in all copies of this file and its derivatives.
+ *
+ * MVME147 port for TNI - Telecom Bretagne
+ * by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+ * May 1996
+ *
+ * $Id$
+ */
+
+#include <bsp.h>
+#include <rtems/libio.h>
+
+#include <libcsupport.h>
+
+#include <string.h>
+#include <fcntl.h>
+
+#ifdef STACK_CHECKER_ON
+#include <stackchk.h>
+#endif
+
+/*
+ * The original table from the application and our copy of it with
+ * some changes.
+ */
+
+extern rtems_configuration_table Configuration;
+rtems_configuration_table BSP_Configuration;
+
+rtems_cpu_table Cpu_table;
+
+char *rtems_progname;
+
+/* Initialize whatever libc we are using
+ * called from postdriver hook
+ */
+
+void bsp_libc_init()
+{
+ extern int end;
+ rtems_unsigned32 heap_start;
+
+ heap_start = (rtems_unsigned32) &end;
+ if (heap_start & (CPU_ALIGNMENT-1))
+ heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
+
+ RTEMS_Malloc_Initialize((void *) heap_start, 64 * 1024, 0);
+
+ /*
+ * Init the RTEMS libio facility to provide UNIX-like system
+ * calls for use by newlib (ie: provide __open, __close, etc)
+ * Uses malloc() to get area for the iops, so must be after malloc init
+ */
+
+ rtems_libio_init();
+
+ /*
+ * Set up for the libc handling.
+ */
+
+ if (BSP_Configuration.ticks_per_timeslice > 0)
+ libc_init(1); /* reentrant if possible */
+ else
+ libc_init(0); /* non-reentrant */
+}
+
+/*
+ * Function: bsp_pretasking_hook
+ * Created: 95/03/10
+ *
+ * Description:
+ * BSP pretasking hook. Called just before drivers are initialized.
+ * Used to setup libc and install any BSP extensions.
+ *
+ * NOTES:
+ * Must not use libc (to do io) from here, since drivers are
+ * not yet initialized.
+ *
+ */
+
+void
+bsp_pretasking_hook(void)
+{
+ bsp_libc_init();
+
+#ifdef STACK_CHECKER_ON
+ /*
+ * Initialize the stack bounds checker
+ * We can either turn it on here or from the app.
+ */
+
+ Stack_check_Initialize();
+#endif
+
+#ifdef RTEMS_DEBUG
+ rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
+#endif
+}
+
+
+/*
+ * After drivers are setup, register some "filenames"
+ * and open stdin, stdout, stderr files
+ *
+ * Newlib will automatically associate the files with these
+ * (it hardcodes the numbers)
+ */
+
+void
+bsp_postdriver_hook(void)
+{
+ int stdin_fd, stdout_fd, stderr_fd;
+ int error_code;
+
+ error_code = 'S' << 24 | 'T' << 16;
+
+ if ((stdin_fd = __open("/dev/console", O_RDONLY, 0)) == -1)
+ rtems_fatal_error_occurred( error_code | 'D' << 8 | '0' );
+
+ if ((stdout_fd = __open("/dev/console", O_WRONLY, 0)) == -1)
+ rtems_fatal_error_occurred( error_code | 'D' << 8 | '1' );
+
+ if ((stderr_fd = __open("/dev/console", O_WRONLY, 0)) == -1)
+ rtems_fatal_error_occurred( error_code | 'D' << 8 | '2' );
+
+ if ((stdin_fd != 0) || (stdout_fd != 1) || (stderr_fd != 2))
+ rtems_fatal_error_occurred( error_code | 'I' << 8 | 'O' );
+}
+
+
+int main(
+ int argc,
+ char **argv,
+ char **environp
+)
+{
+ m68k_isr_entry *monitors_vector_table;
+ int index;
+
+ if ((argc > 0) && argv && argv[0])
+ rtems_progname = argv[0];
+ else
+ rtems_progname = "RTEMS";
+
+ monitors_vector_table = (m68k_isr_entry *)0; /* 135Bug Vectors are at 0 */
+ m68k_set_vbr( monitors_vector_table );
+
+ for ( index=2 ; index<=255 ; index++ )
+ M68Kvec[ index ] = monitors_vector_table[ 32 ];
+
+ M68Kvec[ 2 ] = monitors_vector_table[ 2 ]; /* bus error vector */
+ M68Kvec[ 4 ] = monitors_vector_table[ 4 ]; /* breakpoints vector */
+ M68Kvec[ 9 ] = monitors_vector_table[ 9 ]; /* trace vector */
+ M68Kvec[ 47 ] = monitors_vector_table[ 47 ]; /* system call vector */
+
+ m68k_set_vbr( &M68Kvec );
+
+ pcc->int_base_vector = PCC_BASE_VECTOR; /* Set the PCC int vectors base */
+
+ (*(rtems_unsigned8 *)0xfffe2001) = 0x08;
+ /* make VME access round-robin */
+
+ m68k_enable_caching();
+
+ /*
+ * we only use a hook to get the C library initialized.
+ */
+
+ Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */
+
+ Cpu_table.predriver_hook = NULL;
+
+ Cpu_table.postdriver_hook = bsp_postdriver_hook;
+
+ Cpu_table.idle_task = NULL; /* do not override system IDLE task */
+
+ Cpu_table.do_zero_of_workspace = TRUE;
+
+ Cpu_table.interrupt_vector_table = (m68k_isr_entry *) &M68Kvec;
+
+ Cpu_table.interrupt_stack_size = 4096;
+
+ Cpu_table.extra_mpci_receive_server_stack = 0;
+
+ /*
+ * Copy the table
+ */
+
+ BSP_Configuration = Configuration;
+
+ BSP_Configuration.work_space_start = (void *)
+ (RAM_END - BSP_Configuration.work_space_size);
+
+ /*
+ * Add 1 region for the RTEMS Malloc
+ */
+
+ BSP_Configuration.maximum_regions++;
+
+ /*
+ * Add 1 extension for newlib libc
+ */
+
+#ifdef RTEMS_NEWLIB
+ BSP_Configuration.maximum_extensions++;
+#endif
+
+ /*
+ * Add another extension if using the stack checker
+ */
+
+#ifdef STACK_CHECKER_ON
+ BSP_Configuration.maximum_extensions++;
+#endif
+
+ /*
+ * Tell libio how many fd's we want and allow it to tweak config
+ */
+
+ rtems_libio_config(&BSP_Configuration, BSP_LIBIO_MAX_FDS);
+
+ rtems_initialize_executive( &BSP_Configuration, &Cpu_table );
+ /* does not return */
+
+ bsp_cleanup();
+
+ return 0;
+}
diff --git a/c/src/lib/libbsp/m68k/mvme147/startup/linkcmds b/c/src/lib/libbsp/m68k/mvme147/startup/linkcmds
new file mode 100644
index 0000000000..c9803769ca
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147/startup/linkcmds
@@ -0,0 +1,52 @@
+/*
+ * This file contains directives for the GNU linker which are specific
+ * to the Motorola MVME147 boards.
+ *
+ * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ * On-Line Applications Research Corporation (OAR).
+ * All rights assigned to U.S. Government, 1994.
+ *
+ * This material may be reproduced by or for the U.S. Government pursuant
+ * to the copyright license under the clause at DFARS 252.227-7013. This
+ * notice must appear in all copies of this file and its derivatives.
+ *
+ * MVME147 port for TNI - Telecom Bretagne
+ * by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+ * May 1996
+ *
+ * $Id$
+ */
+
+MEMORY
+ {
+ ram : org = 0x5000, l = 0x3fafff
+ }
+
+SECTIONS
+{
+ .text 0x5000 :
+ {
+ text_start = . ;
+ _text_start = . ;
+ *(.text)
+ etext = ALIGN( 0x10 ) ;
+ _etext = .;
+ }
+ .data ADDR( .text ) + SIZEOF( .text ):
+ {
+ data_start = . ;
+ _data_start = .;
+ *(.data)
+ edata = ALIGN( 0x10 ) ;
+ _edata = .;
+ }
+ .bss ADDR( .data ) + SIZEOF( .data ):
+ {
+ bss_start = . ;
+ _bss_start = . ;
+ *(.bss)
+ *(COMMON)
+ end = . ;
+ _end = . ;
+ }
+}
diff --git a/c/src/lib/libbsp/m68k/mvme147/timer/timer.c b/c/src/lib/libbsp/m68k/mvme147/timer/timer.c
new file mode 100644
index 0000000000..aec88756dc
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147/timer/timer.c
@@ -0,0 +1,84 @@
+/* Timer_init()
+ *
+ * This routine initializes the PCC timer on the MVME147 board.
+ *
+ * Input parameters: NONE
+ *
+ * Output parameters: NONE
+ *
+ * NOTE: It is important that the timer start/stop overhead be
+ * determined when porting or modifying this code.
+ *
+ * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ * On-Line Applications Research Corporation (OAR).
+ * All rights assigned to U.S. Government, 1994.
+ *
+ * This material may be reproduced by or for the U.S. Government pursuant
+ * to the copyright license under the clause at DFARS 252.227-7013. This
+ * notice must appear in all copies of this file and its derivatives.
+ *
+ * MVME147 port for TNI - Telecom Bretagne
+ * by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+ * May 1996
+ *
+ * $Id$
+ */
+
+#include <bsp.h>
+
+#define TIMER_INT_LEVEL 6
+
+#define COUNTDOWN_VALUE 0
+/* Allows 0.4096 second delay betwin ints */
+/* Each tick is 6.25 us */
+
+int Ttimer_val;
+rtems_boolean Timer_driver_Find_average_overhead;
+
+rtems_isr timerisr();
+
+void Timer_initialize()
+{
+ (void) set_vector(timerisr, TIMER_1_VECTOR, 0); /* install ISR */
+
+ Ttimer_val = 0; /* clear timer ISR count */
+ pcc->timer1_int_control = 0x00; /* Disable T1 Interr. */
+ pcc->timer1_preload = COUNTDOWN_VALUE;
+ /* write countdown preload value */
+ pcc->timer1_control = 0x00; /* load preload value */
+ pcc->timer1_control = 0x07; /* clear T1 overflow counter, enable counter */
+ pcc->timer1_int_control = TIMER_INT_LEVEL|0x08;
+ /* Enable Timer 1 and set its int. level */
+
+}
+
+#define AVG_OVERHEAD 0 /* No need to start/stop the timer to read
+ its value on the MVME147 PCC: reads are not
+ synchronized whith the counter updates*/
+#define LEAST_VALID 10 /* Don't trust a value lower than this */
+
+int Read_timer()
+{
+ rtems_unsigned32 total;
+ rtems_unsigned16 counter_value;
+
+ counter_value = pcc->timer1_count; /* read the counter value */
+
+ total = ((Ttimer_val * 0x10000) + counter_value); /* in 6.25 us units */
+ /* DC note : just look at the assembly generated
+ to see gcc's impressive optimization ! */
+ return total;
+
+}
+
+rtems_status_code Empty_function( void )
+{
+ return RTEMS_SUCCESSFUL;
+}
+
+void Set_find_average_overhead(
+ rtems_boolean find_flag
+)
+{
+ Timer_driver_Find_average_overhead = find_flag;
+}
diff --git a/c/src/lib/libbsp/m68k/mvme147/timer/timerisr.s b/c/src/lib/libbsp/m68k/mvme147/timer/timerisr.s
new file mode 100644
index 0000000000..a4102ffc91
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147/timer/timerisr.s
@@ -0,0 +1,28 @@
+# timer_isr()
+#
+# This routine provides the ISR for the PCC timer on the MVME147
+# board. The timer is set up to generate an interrupt at maximum
+# intervals.
+#
+# MVME147 port for TNI - Telecom Bretagne
+# by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+# May 1996
+#
+# $Id$
+#
+
+#include "asm.h"
+
+BEGIN_CODE
+
+.set T1_CONTROL_REGISTER, 0xfffe1018 | timer 1 control register
+
+ PUBLIC (timerisr)
+SYM (timerisr):
+ orb #0x80, T1_CONTROL_REGISTER | clear T1 int status bit
+ addql #1, SYM (Ttimer_val) | increment timer value
+end_timerisr:
+ rte
+
+END_CODE
+END
diff --git a/c/src/lib/libbsp/m68k/mvme147/times b/c/src/lib/libbsp/m68k/mvme147/times
new file mode 100644
index 0000000000..d1bae93265
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147/times
@@ -0,0 +1,194 @@
+#
+# Timing Test Suite Results for the Motorola MVME147 BSP
+#
+# MVME147 port for TNI - Telecom Bretagne
+# by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+# May 1996
+#
+# $Id$
+#
+
+Board: Motorola MVME147S
+CPU: Motorola MC68030 + MC68882 FPU
+Clock Speed: 20 Mhz
+Memory Configuration: DRAM w/no cache
+Wait States: ? wait state
+
+Times Reported in: microseconds (6.25 us grain)
+Timer Source: MVME147 Peripheral Channel Controller tick timer
+
+Column A: 3.5.1 pre-release
+
+# DESCRIPTION A
+== ================================================================= ====
+ 1 rtems_semaphore_create 69
+ rtems_semaphore_delete 69
+ rtems_semaphore_obtain: available 44
+ rtems_semaphore_obtain: not available -- NO_WAIT 44
+ rtems_semaphore_release: no waiting tasks 56
+
+ 2 rtems_semaphore_obtain: not available -- caller blocks 125
+
+ 3 rtems_semaphore_release: task readied -- preempts caller 106
+
+ 4 rtems_task_restart: blocked task -- preempts caller 181
+ rtems_task_restart: ready task -- preempts caller 169
+ rtems_semaphore_release: task readied -- returns to caller 81
+ rtems_task_create 169
+ rtems_task_start 87
+ rtems_task_restart: suspended task -- returns to caller 106
+ rtems_task_delete: suspended task 169
+ rtems_task_restart: ready task -- returns to caller 112
+ rtems_task_restart: blocked task -- returns to caller 150
+ rtems_task_delete: blocked task 175
+
+ 5 rtems_task_suspend: calling task 87
+ rtems_task_resume: task readied -- preempts caller 75
+
+ 6 rtems_task_restart: calling task 112
+ rtems_task_suspend: returns to caller 56
+ rtems_task_resume: task readied -- returns to caller 50
+ rtems_task_delete: ready task 169
+
+ 7 rtems_task_restart: suspended task -- preempts caller 143
+
+ 8 rtems_task_set_priority: obtain current priority 37
+ rtems_task_set_priority: returns to caller 75
+ rtems_task_mode: obtain current mode 6
+ rtems_task_mode: no reschedule 6
+ rtems_task_mode: reschedule -- returns to caller 19
+ rtems_task_mode: reschedule -- preempts caller 75
+ rtems_task_set_note 37
+ rtems_task_get_note 37
+ rtems_clock_set 87
+ rtems_clock_get 0
+
+ 9 rtems_message_queue_create 225
+ rtems_message_queue_send: no waiting tasks 112
+ rtems_message_queue_urgent: no waiting tasks 112
+ rtems_message_queue_receive: available 87
+ rtems_message_queue_flush: no messages flushed 37
+ rtems_message_queue_flush: messages flushed 50
+ rtems_message_queue_delete 106
+
+10 rtems_message_queue_receive: not available -- NO_WAIT 44
+ rtems_message_queue_receive: not available -- caller blocks 125
+
+11 rtems_message_queue_send: task readied -- preempts caller 144
+
+12 rtems_message_queue_send: task readied -- returns to caller 119
+
+13 rtems_message_queue_urgent: task readied -- preempts caller 144
+
+14 rtems_message_queue_urgent: task readied -- returns to caller 119
+
+15 rtems_event_receive: obtain current events 0
+ rtems_event_receive: not available -- NO_WAIT 25
+ rtems_event_receive: not available -- caller blocks 100
+ rtems_event_send: no task readied 31
+ rtems_event_receive: available 37
+ rtems_event_send: task readied -- returns to caller 69
+
+16 rtems_event_send: task readied -- preempts caller 100
+
+17 rtems_task_set_priority: preempts caller 125
+
+18 rtems_task_delete: calling task 200
+
+19 rtems_signal_catch 19
+ rtems_signal_send: returns to caller 50
+ rtems_signal_send: signal to self 56
+ exit ASR overhead: returns to calling task 44
+ exit ASR overhead: returns to preempting task 75
+
+20 rtems_partition_create 81
+ rtems_region_create 75
+ rtems_partition_get_buffer: available 44
+ rtems_partition_get_buffer: not available 44
+ rtems_partition_return_buffer 56
+ rtems_partition_delete 62
+ rtems_region_get_segment: available 56
+ rtems_region_get_segment: not available -- NO_WAIT 56
+ rtems_region_return_segment: no waiting tasks 69
+ rtems_region_get_segment: not available -- caller blocks 144
+ rtems_region_return_segment: task readied -- preempts caller 169
+ rtems_region_return_segment: task readied -- returns to caller 137
+ rtems_region_delete 56
+ rtems_io_initialize 0
+ rtems_io_open 0
+ rtems_io_close 0
+ rtems_io_read 0
+ rtems_io_write 0
+ rtems_io_control 0
+
+21 rtems_task_ident 375
+ rtems_message_queue_ident 362
+ rtems_semaphore_ident 394
+ rtems_partition_ident 362
+ rtems_region_ident 369
+ rtems_port_ident 362
+ rtems_timer_ident 369
+ rtems_rate_monotonic_ident 362
+
+22 rtems_message_queue_broadcast: task readied -- returns to caller 131
+ rtems_message_queue_broadcast: no waiting tasks 62
+ rtems_message_queue_broadcast: task readied -- preempts caller 156
+
+23 rtems_timer_create 31
+ rtems_timer_fire_after: inactive 69
+ rtems_timer_fire_after: active 69
+ rtems_timer_cancel: active 44
+ rtems_timer_cancel: inactive 37
+ rtems_timer_reset: inactive 69
+ rtems_timer_reset: active 69
+ rtems_timer_fire_when: inactive 87
+ rtems_timer_fire_when: active 87
+ rtems_timer_delete: active 56
+ rtems_timer_delete: inactive 50
+ rtems_task_wake_when 125
+
+24 rtems_task_wake_after: yield -- returns to caller 19
+ rtems_task_wake_after: yields -- preempts caller 69
+
+25 rtems_clock_tick 19
+
+26 _ISR_Disable 6
+ _ISR_Flash 6
+ _ISR_Enable 6
+ _Thread_Disable_dispatch 6
+ _Thread_Enable_dispatch 25
+ _Thread_Set_state 31
+ _Thread_Disptach (NO FP) 62
+ context switch: no floating point contexts 50
+ context switch: self 12
+ context switch: to another task 12
+ context switch: restore 1st FP task 56
+ fp context switch: save idle, restore idle 87
+ fp context switch: save idle, restore initialized 75
+ fp context switch: save initialized, restore initialized 75
+ _Thread_Resume 25
+ _Thread_Unblock 25
+ _Thread_Ready 31
+ _Thread_Get 12
+ _Semaphore_Get 6
+ _Thread_Get: invalid id 0
+
+27 interrupt entry overhead: returns to interrupted task 12
+ interrupt exit overhead: returns to interrupted task 12
+ interrupt entry overhead: returns to nested interrupt 19
+ interrupt exit overhead: returns to nested interrupt 6
+ interrupt entry overhead: returns to preempting task 12
+ interrupt exit overhead: returns to preempting task 81
+
+28 rtems_port_create 37
+ rtems_port_external_to_internal 31
+ rtems_port_internal_to_external 31
+ rtems_port_delete 56
+
+29 rtems_rate_monotonic_create 44
+ rtems_rate_monotonic_period: initiate period -- returns to caller 62
+ rtems_rate_monotonic_period: obtain status 37
+ rtems_rate_monotonic_cancel 56
+ rtems_rate_monotonic_delete: inactive 62
+ rtems_rate_monotonic_delete: active 69
+ rtems_rate_monotonic_period: conclude periods -- caller blocks 87