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authorSebastian Huber <sebastian.huber@embedded-brains.de>2018-08-02 09:41:08 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2018-08-02 09:44:14 +0200
commit28b8cf9b898e0745a5e7a6bc8b766fe16abf38a0 (patch)
tree461ed90750bb10b9770abfb3ef01221665a459df
parentbsp/riscv: Fix a synchronization issue for PLIC (diff)
downloadrtems-28b8cf9b898e0745a5e7a6bc8b766fe16abf38a0.tar.bz2
riscv: Fix CPU_ALIGNMENT
Update #3433.
-rw-r--r--cpukit/score/cpu/riscv/include/rtems/score/cpu.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/cpukit/score/cpu/riscv/include/rtems/score/cpu.h b/cpukit/score/cpu/riscv/include/rtems/score/cpu.h
index ce73651d97..64a915e8ee 100644
--- a/cpukit/score/cpu/riscv/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/riscv/include/rtems/score/cpu.h
@@ -76,12 +76,14 @@ extern "C" {
#endif /* __riscv_xlen */
-#define CPU_ALIGNMENT 8
+/* RISC-V ELF psABI specification */
+#define CPU_ALIGNMENT 16
#define CPU_HEAP_ALIGNMENT CPU_ALIGNMENT
#define CPU_PARTITION_ALIGNMENT CPU_ALIGNMENT
+/* RISC-V ELF psABI specification */
#define CPU_STACK_ALIGNMENT 16
#define CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES