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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-08-02 20:26:57 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1999-08-02 20:26:57 +0000 |
commit | 26eff5c29575ca7b0460b3958db1682965fe4384 (patch) | |
tree | f40cf511c7acd168d50a36a7f217d7ac86c4e1cd | |
parent | Updated DDD section after comments from Jiri. (diff) | |
download | rtems-26eff5c29575ca7b0460b3958db1682965fe4384.tar.bz2 |
Fix By Joel based on suggestion from Ian Lance Taylor <ian@airs.com>
to fix problem reported by Ralf Corsepius <corsepiu@faw.uni-ulm.de>.
Date: Fri, 30 Jul 1999 14:53:20 -0500 (CDT)
From: <joel@oarcorp.com>
it is used like this in i386ex/start/start.S
/* set up same values in cache */
start.S: movw $0xFFFB, SYM(i8259s_cache)
I am heading out the door. Any other ideas what could have tripped this?
This instruction appears in a .code16 section. In a .code16 section,
current versions of gas assume that all addresses are 16 bits unless
told otherwise.
If you change the line to
addr32 movw $0xFFFB, SYM(i8259s_cache)
then you will get a 32 bit address reference.
You may want to use addr32 only when NEW_GAS is defined.
-rw-r--r-- | c/src/lib/libbsp/i386/i386ex/start/start.S | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/i386/i386ex/start/start.S b/c/src/lib/libbsp/i386/i386ex/start/start.S index e7500bd9b4..5d4099a25e 100644 --- a/c/src/lib/libbsp/i386/i386ex/start/start.S +++ b/c/src/lib/libbsp/i386/i386ex/start/start.S @@ -324,7 +324,16 @@ SYM(InitInt): SetExRegByte(OCW1M , 0xde ) # IR0 only = 0xfe. for IR5 and IR0 active use 0xde SetExRegByte(INTCFG , 0x00 ) - movw $0xFFFB, SYM(i8259s_cache) /* set up same values in cache */ + /* + * The addr32 override should ensure that the address for + * i8259s_cache is put in 32-bit address space. + */ + +#if defined(NEW_GAS) + addr32 movw $0xFFFB, SYM(i8259s_cache) # set up same values in cache +#else + movw $0xFFFB, SYM(i8259s_cache) # set up same values in cache +#endif SYM(SetCS4): SetExRegWord(CS4ADL , 0x702) #Configure chip select 4 |