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authorJoel Sherrill <joel.sherrill@OARcorp.com>2003-07-23 17:40:02 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2003-07-23 17:40:02 +0000
commit129b4a792b980632ebfc24641538d533bf853e27 (patch)
tree956fe2b3102c5bdf3c46a9675a628211d6888dbf
parent1ede24cc0142fadd041d60be2125cd51336c0e22 (diff)
downloadrtems-129b4a792b980632ebfc24641538d533bf853e27.tar.bz2
2003-07-18 Till Straumann <strauman@slac.stanford.edu>
PR 288/rtems * support/new_exception_processing/cpu.c: _ISR_Nest_level is now properly maintained and does not reside in SPRG0.
-rw-r--r--c/src/lib/libbsp/powerpc/ChangeLog6
-rw-r--r--c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c32
-rw-r--r--c/src/lib/libcpu/powerpc/new-exceptions/cpu.c32
3 files changed, 22 insertions, 48 deletions
diff --git a/c/src/lib/libbsp/powerpc/ChangeLog b/c/src/lib/libbsp/powerpc/ChangeLog
index 602bdd4698..df8be63b14 100644
--- a/c/src/lib/libbsp/powerpc/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/ChangeLog
@@ -1,3 +1,9 @@
+2003-07-18 Till Straumann <strauman@slac.stanford.edu>
+
+ PR 288/rtems
+ * support/new_exception_processing/cpu.c: _ISR_Nest_level is now
+ properly maintained and does not reside in SPRG0.
+
2003-03-06 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* configure.ac: Remove AC_CONFIG_AUX_DIR.
diff --git a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c
index 9dcd1b4da2..289ce61b56 100644
--- a/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c
+++ b/c/src/lib/libbsp/powerpc/support/new_exception_processing/cpu.c
@@ -50,6 +50,14 @@ void _CPU_Initialize(
)
{
_CPU_Table = *cpu_table;
+
+ { unsigned hasFixed = 0;
+ /* assert that our BSP has fixed PR288 */
+ __asm__ __volatile__ ("mfspr %0, %2":"=r"(hasFixed):"0"(hasFixed),"i"(SPRG0));
+ if ( PPC_BSP_HAS_FIXED_PR288 != hasFixed ) {
+ BSP_panic("This BSP needs to fix PR#288");
+ }
+ }
}
/*PAGE
@@ -143,27 +151,3 @@ void _CPU_Install_interrupt_stack( void )
{
}
-/*PAGE
- *
- * This is the PowerPC specific implementation of the routine which
- * returns TRUE if an interrupt is in progress.
- */
-
-boolean _ISR_Is_in_progress( void )
-{
- /*
- * Until the patch on PR288 is in all new exception BSPs, this is
- * the safest thing to do.
- */
-#ifdef mpc8260
- return (_ISR_Nest_level != 0);
-#else
- register unsigned int isr_nesting_level;
- /*
- * Move from special purpose register 0 (mfspr SPRG0, r3)
- */
- asm volatile ("mfspr %0, 272" : "=r" (isr_nesting_level));
- return isr_nesting_level;
-#endif
-}
-
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c b/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c
index 9dcd1b4da2..289ce61b56 100644
--- a/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c
+++ b/c/src/lib/libcpu/powerpc/new-exceptions/cpu.c
@@ -50,6 +50,14 @@ void _CPU_Initialize(
)
{
_CPU_Table = *cpu_table;
+
+ { unsigned hasFixed = 0;
+ /* assert that our BSP has fixed PR288 */
+ __asm__ __volatile__ ("mfspr %0, %2":"=r"(hasFixed):"0"(hasFixed),"i"(SPRG0));
+ if ( PPC_BSP_HAS_FIXED_PR288 != hasFixed ) {
+ BSP_panic("This BSP needs to fix PR#288");
+ }
+ }
}
/*PAGE
@@ -143,27 +151,3 @@ void _CPU_Install_interrupt_stack( void )
{
}
-/*PAGE
- *
- * This is the PowerPC specific implementation of the routine which
- * returns TRUE if an interrupt is in progress.
- */
-
-boolean _ISR_Is_in_progress( void )
-{
- /*
- * Until the patch on PR288 is in all new exception BSPs, this is
- * the safest thing to do.
- */
-#ifdef mpc8260
- return (_ISR_Nest_level != 0);
-#else
- register unsigned int isr_nesting_level;
- /*
- * Move from special purpose register 0 (mfspr SPRG0, r3)
- */
- asm volatile ("mfspr %0, 272" : "=r" (isr_nesting_level));
- return isr_nesting_level;
-#endif
-}
-