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authorSebastian Huber <sebastian.huber@embedded-brains.de>2013-10-27 18:51:53 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2013-10-27 18:54:50 +0100
commit0f874ee501262436ffdfe6ac84a09b9f0628b286 (patch)
tree07edd3140717361689a4a0dcc95c109f9ea48204
parentIMFS: Use IMFS_mtime_ctime_update() (diff)
downloadrtems-0f874ee501262436ffdfe6ac84a09b9f0628b286.tar.bz2
bsps/arm: Init trans tbl with invalid entries
-rw-r--r--c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h b/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h
index 88f903b1dc..b5d5de8e54 100644
--- a/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h
+++ b/c/src/lib/libbsp/arm/shared/include/arm-cp15-start.h
@@ -90,9 +90,9 @@ arm_cp15_start_setup_translation_table_and_enable_mmu_and_cache(
arm_cp15_set_domain_access_control(dac);
arm_cp15_set_translation_table_base(ttb);
- /* Initialize translation table with fixed-map read-write entries */
+ /* Initialize translation table with invalid entries */
for (i = 0; i < ARM_MMU_TRANSLATION_TABLE_ENTRY_COUNT; ++i) {
- ttb [i] = (i << ARM_MMU_SECT_BASE_SHIFT) | ARMV7_MMU_DATA_READ_WRITE;
+ ttb [i] = 0;
}
for (i = 0; i < config_count; ++i) {