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authorDaniel Hellstrom <daniel@gaisler.com>2017-01-22 11:34:25 +0100
committerDaniel Hellstrom <daniel@gaisler.com>2017-03-06 07:54:55 +0100
commit090016a4fbfaa8fc7220aa17d7f0e8d9963523d1 (patch)
treeda8b70b411e0a85f3bac026288e50436a02988b4
parentleon, grspw_pkt: fix descriptor table mem leak on grspw_close() (diff)
downloadrtems-090016a4fbfaa8fc7220aa17d7f0e8d9963523d1.tar.bz2
leon, grspw_pkt: ISR activate shutdown work only if errintr enabled
In shared interrupt systems it might be a problem to handle the interrupt regardless of the interrupt is enabled. Now the same approach to the DMA RX/TX interrupt in the ISR is taken.
-rw-r--r--c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
index 498333e933..d3eca270ac 100644
--- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
+++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c
@@ -2819,7 +2819,8 @@ STATIC void grspw_isr(void *data)
if (stat & GRSPW_STS_WE)
priv->stats.err_wsync++;
- if ((priv->dis_link_on_err >> 16) & stat) {
+ if (((priv->dis_link_on_err >> 16) & stat) &&
+ (REG_READ(&priv->regs->ctrl) & GRSPW_CTRL_IE)) {
/* Disable the link, no more transfers are expected
* on any DMA channel.
*/