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| author | Eric Norum <WENorum@lbl.gov> | 2009-07-28 19:29:44 +0000 |
|---|---|---|
| committer | Eric Norum <WENorum@lbl.gov> | 2009-07-28 19:29:44 +0000 |
| commit | 9bfb3c61aa36a7d71024579edfdb9495b5d1bd1f (patch) | |
| tree | b30041b7953052f9494e99c6c838e426ed0185e9 | |
| parent | Regenerate. (diff) | |
| download | rtems-9bfb3c61aa36a7d71024579edfdb9495b5d1bd1f.tar.bz2 | |
PR 1420/bsps
Turn on buffered writes to DRAM. As Device Errata SECF124 notes this may cause
double writes, but that's not really a big problem and benchmarking tests have
shown that buffered writes do gain some performance.
| -rw-r--r-- | c/src/lib/libbsp/m68k/uC5282/ChangeLog | 8 | ||||
| -rw-r--r-- | c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c | 7 |
2 files changed, 14 insertions, 1 deletions
diff --git a/c/src/lib/libbsp/m68k/uC5282/ChangeLog b/c/src/lib/libbsp/m68k/uC5282/ChangeLog index 0531e4dd05..5c9a88906f 100644 --- a/c/src/lib/libbsp/m68k/uC5282/ChangeLog +++ b/c/src/lib/libbsp/m68k/uC5282/ChangeLog @@ -1,3 +1,11 @@ +2009-07-28 Eric Norum <norume@aps.anl.gov> + + PR 1420/bsps + * startup/bspstart.c: Turn on buffered writes to DRAM. As Device Errata + SECF124 notes this may cause double writes, but that's not really a big + problem and benchmarking tests have shown that buffered writes do gain + some performance. + 2009-06-02 Eric Norum <norume@aps.anl.gov> PR 1420/bsps diff --git a/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c b/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c index 260db55f3f..4dbd9c0470 100644 --- a/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c +++ b/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c @@ -278,11 +278,16 @@ void bsp_start( void ) /* * Cache SDRAM + * Enable buffered writes + * As Device Errata SECF124 notes this may cause double writes, + * but that's not really a big problem and benchmarking tests have + * shown that buffered writes do gain some performance. */ mcf5282_acr0_mode = MCF5XXX_ACR_AB((uint32_t)_RamBase) | MCF5XXX_ACR_AM((uint32_t)_RamSize-1) | MCF5XXX_ACR_EN | - MCF5XXX_ACR_SM_IGNORE; + MCF5XXX_ACR_SM_IGNORE | + MCF5XXX_ACR_BWE; m68k_set_acr0(mcf5282_acr0_mode); /* |