2008-08-04 Joel Sherrill <joel.sherrill@OARcorp.com>

	PR 1294/bsps
	* rtems/score/cpu.h, rtems/score/sparc.h: Correct prototype and usage
	of sparc_disable_interrupts.

3 files changed, 9 insertions, 38 deletions

diff --git a/cpukit/score/cpu/sparc/ChangeLog b/cpukit/score/cpu/sparc/ChangeLog
index 2e7b3fa29a..2d06233369 100644
--- a/cpukit/score/cpu/sparc/ChangeLog
+++ b/cpukit/score/cpu/sparc/ChangeLog
@@ -1,3 +1,9 @@
+2008-08-04	Joel Sherrill <joel.sherrill@OARcorp.com>
+
+	PR 1294/bsps
+	* rtems/score/cpu.h, rtems/score/sparc.h: Correct prototype and usage
+	of sparc_disable_interrupts.
+
 2008-02-20	Alexandru Bugnar <a-bugnar@criticalsoftware.com>
 
 	PR 1278/cpukit
diff --git a/cpukit/score/cpu/sparc/rtems/score/cpu.h b/cpukit/score/cpu/sparc/rtems/score/cpu.h
index 4dee854311..5046cf6ac8 100644
--- a/cpukit/score/cpu/sparc/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sparc/rtems/score/cpu.h
@@ -714,9 +714,6 @@ extern const CPU_Trap_table_entry _CPU_Trap_slot_template;
 
 #ifndef ASM
 
-extern unsigned int sparc_disable_interrupts();
-extern void sparc_enable_interrupts();
-
 /*
  *  ISR handler macros
  */
diff --git a/cpukit/score/cpu/sparc/rtems/score/sparc.h b/cpukit/score/cpu/sparc/rtems/score/sparc.h
index 2cb9933fb8..bd2fb697e6 100644
--- a/cpukit/score/cpu/sparc/rtems/score/sparc.h
+++ b/cpukit/score/cpu/sparc/rtems/score/sparc.h
@@ -205,50 +205,18 @@ extern "C" {
 
 /*
  *  Manipulate the interrupt level in the psr 
- *
  */
 
-/*
-#define sparc_disable_interrupts( _level ) \
-  do { \
-    register unsigned int _newlevel; \
-    \
-    sparc_get_psr( _level ); \
-    (_newlevel) = (_level) | SPARC_PSR_PIL_MASK; \
-    sparc_set_psr( _newlevel ); \
-  } while ( 0 )
-
-#define sparc_enable_interrupts( _level ) \
-  do { \
-    unsigned int _tmp; \
-    \
-    sparc_get_psr( _tmp ); \
-    _tmp &= ~SPARC_PSR_PIL_MASK; \
-    _tmp |= (_level) & SPARC_PSR_PIL_MASK; \
-    sparc_set_psr( _tmp ); \
-  } while ( 0 ) 
-*/
+uint32_t sparc_disable_interrupts(void);
+void sparc_enable_interrupts(uint32_t);
   
 #define sparc_flash_interrupts( _level ) \
   do { \
     register uint32_t   _ignored = 0; \
     \
     sparc_enable_interrupts( (_level) ); \
-    sparc_disable_interrupts( _ignored ); \
-  } while ( 0 )
-
-/*
-#define sparc_set_interrupt_level( _new_level ) \
-  do { \
-    register uint32_t   _new_psr_level = 0; \
-    \
-    sparc_get_psr( _new_psr_level ); \
-    _new_psr_level &= ~SPARC_PSR_PIL_MASK; \
-    _new_psr_level |= \
-      (((_new_level) << SPARC_PSR_PIL_BIT_POSITION) & SPARC_PSR_PIL_MASK); \
-    sparc_set_psr( _new_psr_level ); \
+    _ignored = sparc_disable_interrupts(); \
   } while ( 0 )
-*/
 
 #define sparc_get_interrupt_level( _level ) \
   do { \