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authorPavel Pisa <pisa@cmp.felk.cvut.cz>2016-10-03 11:54:41 +0200
committerPavel Pisa <pisa@cmp.felk.cvut.cz>2016-10-03 11:54:41 +0200
commit58073284c6d33c3062abc529931021b1d47299af (patch)
tree404e2b0fb6bc5361c142896f4c1d9dbb16d6895e
parentlibdl/rtl-obj.c: synchronize cache should not depend on CPU_CACHE_LINE_BYTES. (diff)
downloadrtems-58073284c6d33c3062abc529931021b1d47299af.tar.bz2
bsps/arm: do not introduce CPU_CACHE_LINE_BYTES in 4.11 and correct CPU_STRUCTURE_ALIGNMENT.
-rw-r--r--cpukit/score/cpu/arm/rtems/score/cpu.h6
1 files changed, 2 insertions, 4 deletions
diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h
index 25d4ee2fb7..69838c5bf8 100644
--- a/cpukit/score/cpu/arm/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/rtems/score/cpu.h
@@ -146,13 +146,11 @@
#define CPU_STACK_GROWS_UP FALSE
#if defined(ARM_MULTILIB_CACHE_LINE_MAX_64)
- #define CPU_CACHE_LINE_BYTES 32
+ #define CPU_STRUCTURE_ALIGNMENT __attribute__ ((aligned ( 64 )))
#else
- #define CPU_CACHE_LINE_BYTES 64
+ #define CPU_STRUCTURE_ALIGNMENT __attribute__ ((aligned ( 32 )))
#endif
-#define CPU_STRUCTURE_ALIGNMENT __attribute__ ((aligned (CPU_CACHE_LINE_BYTES )))
-
#define CPU_TIMESTAMP_USE_STRUCT_TIMESPEC TRUE
/*