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authorSebastian Huber <sebastian.huber@embedded-brains.de>2015-07-31 09:55:22 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2015-07-31 09:58:48 +0200
commitd0733bb871e31d9742afb84610ab4beb708c635c (patch)
tree79ef0df2d9525fd9b73ec44d1d73df05e71503d3
parentscore: Add self-contained condition implementation (diff)
downloadrtems-d0733bb871e31d9742afb84610ab4beb708c635c.tar.bz2
bsps/arm: Do not use __ARM_ARCH_7A__
This would lead to link-time errors in case less specialized compiler machine options are used, e.g. to run the GCC test suite.
-rw-r--r--c/src/lib/libbsp/arm/shared/include/arm-errata.h44
1 files changed, 16 insertions, 28 deletions
diff --git a/c/src/lib/libbsp/arm/shared/include/arm-errata.h b/c/src/lib/libbsp/arm/shared/include/arm-errata.h
index c58084a25b..4403eb1604 100644
--- a/c/src/lib/libbsp/arm/shared/include/arm-errata.h
+++ b/c/src/lib/libbsp/arm/shared/include/arm-errata.h
@@ -30,31 +30,24 @@
extern "C" {
#endif /* __cplusplus */
-#if defined( __ARM_ARCH_7A__ )
-static arm_release_id arm_errata_get_processor_release(
- void
-)
+static inline arm_release_id arm_errata_get_processor_release(void)
{
const uint32_t MIDR = arm_cp15_get_id_code();
const uint8_t REVISION = (MIDR & 0xF00000U) >> 20;
const uint8_t PATCH_LEVEL = (MIDR & 0xFU);
-
+
return ARM_RELEASE_ID_FROM_NUMBER_AND_PATCH_LEVEL(
REVISION,
PATCH_LEVEL
);
}
-#endif /* #if defined( __ARM_ARCH_7A__ ) */
-#if defined( __ARM_ARCH_7A__ )
-#if ( defined( RTEMS_SMP ) )
-static bool arm_errata_is_applicable_processor_errata_764369(
- void
-)
+static bool inline arm_errata_is_applicable_processor_errata_764369(void)
{
+#if defined(RTEMS_SMP)
const arm_release_id RELEASE = arm_errata_get_processor_release();
bool is_applicable = false;
-
+
/* Errata information for Cortex-A9 processors.
* Information taken from ARMs
* "Cortex-A series processors
@@ -64,7 +57,7 @@ static bool arm_errata_is_applicable_processor_errata_764369(
* - ARM Cortex-A9 processors r4 release Software Developers Errata Notice"
* The corresponding link is: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/BABJFIBA.html
* Please see this document for more information on these erratas */
-
+
switch( RELEASE ) {
case ARM_RELEASE_ID_R4_P1:
case ARM_RELEASE_ID_R4_P4:
@@ -82,22 +75,18 @@ static bool arm_errata_is_applicable_processor_errata_764369(
is_applicable = false;
break;
}
-
+
return is_applicable;
-}
#else
- #define arm_errata_is_applicable_processor_errata_764369() false
-#endif /* ( defined( RTEMS_SMP ) ) */
-#endif /* #if defined( __ARM_ARCH_7A__ ) */
-
-#if defined( __ARM_ARCH_7A__ )
-static bool arm_errata_is_applicable_processor_errata_775420(
- void
-)
+ return false;
+#endif
+}
+
+static inline bool arm_errata_is_applicable_processor_errata_775420(void)
{
const arm_release_id RELEASE = arm_errata_get_processor_release();
bool is_applicable = false;
-
+
/* Errata information for Cortex-A9 processors.
* Information taken from ARMs
* "Cortex-A series processors
@@ -107,7 +96,7 @@ static bool arm_errata_is_applicable_processor_errata_775420(
* - ARM Cortex-A9 processors r4 release Software Developers Errata Notice"
* The corresponding link is: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0360f/BABJFIBA.html
* Please see this document for more information on these erratas */
-
+
switch( RELEASE ) {
case ARM_RELEASE_ID_R2_P10:
case ARM_RELEASE_ID_R2_P8:
@@ -120,13 +109,12 @@ static bool arm_errata_is_applicable_processor_errata_775420(
is_applicable = false;
break;
}
-
+
return is_applicable;
}
-#endif /* #if defined( __ARM_ARCH_7A__ ) */
#ifdef __cplusplus
}
#endif /* __cplusplus */
-#endif /* ARM_ERRATA_H_ */ \ No newline at end of file
+#endif /* ARM_ERRATA_H_ */