summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorRalf Corsepius <ralf.corsepius@rtems.org>2011-05-25 11:23:30 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2011-05-25 11:23:30 +0000
commit4667b4d130d3dcd024217cde4371ee5d3f82912c (patch)
tree88bf378d040c51973be7e7972e3939d2264fee25
parent2011-05-25 Ralf Corsépius <ralf.corsepius@rtems.org> (diff)
downloadrtems-4667b4d130d3dcd024217cde4371ee5d3f82912c.tar.bz2
Merge with CVS-HEAD.
-rw-r--r--c/src/lib/libcpu/bfin/ChangeLog9
-rw-r--r--c/src/lib/libcpu/bfin/serial/uart.c8
-rw-r--r--c/src/lib/libcpu/bfin/serial/uart.h8
-rw-r--r--c/src/lib/libcpu/bfin/timer/timer.c22
4 files changed, 26 insertions, 21 deletions
diff --git a/c/src/lib/libcpu/bfin/ChangeLog b/c/src/lib/libcpu/bfin/ChangeLog
index 2c515d1364..af5d36faca 100644
--- a/c/src/lib/libcpu/bfin/ChangeLog
+++ b/c/src/lib/libcpu/bfin/ChangeLog
@@ -1,3 +1,7 @@
+2011-05-25 Ralf Corsépius <ralf.corsepius@rtems.org>
+
+ * serial/uart.c, serial/uart.h: Remove CVS-Author tag.
+
2011-04-20 Rohan Kangralkar <rkangral@ece.neu.edu>
PR 1781/bsps
@@ -12,6 +16,11 @@
type of interrupt is identified by the central ISR dispatcher
bf52x/interrupt or interrupt/. This simplifies the UART ISR.
+2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>
+
+ * timer/timer.c:
+ Use "__asm__" instead of "asm" for improved c99-compliance.
+
2011-02-02 Ralf Corsépius <ralf.corsepius@rtems.org>
* configure.ac: Require autoconf-2.68, automake-1.11.1.
diff --git a/c/src/lib/libcpu/bfin/serial/uart.c b/c/src/lib/libcpu/bfin/serial/uart.c
index 2135f7531f..4fb810437b 100644
--- a/c/src/lib/libcpu/bfin/serial/uart.c
+++ b/c/src/lib/libcpu/bfin/serial/uart.c
@@ -6,14 +6,12 @@
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
- *
- * Modified:
- * $ $Author$ Added interrupt support and DMA support
- *
+ */
+
+/*
* $Id$
*/
-
#include <rtems.h>
#include <rtems/libio.h>
#include <rtems/termiostypes.h>
diff --git a/c/src/lib/libcpu/bfin/serial/uart.h b/c/src/lib/libcpu/bfin/serial/uart.h
index fbedaf6537..dee3c29804 100644
--- a/c/src/lib/libcpu/bfin/serial/uart.h
+++ b/c/src/lib/libcpu/bfin/serial/uart.h
@@ -7,14 +7,12 @@
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
- *
- * Modified:
- * $Author$ Added interrupt support and DMA support
- *
+ */
+
+/*
* $Id$
*/
-
#ifndef _UART_H_
#define _UART_H_
diff --git a/c/src/lib/libcpu/bfin/timer/timer.c b/c/src/lib/libcpu/bfin/timer/timer.c
index bb2c88514e..7c66f15cbd 100644
--- a/c/src/lib/libcpu/bfin/timer/timer.c
+++ b/c/src/lib/libcpu/bfin/timer/timer.c
@@ -33,13 +33,13 @@ void benchmark_timer_initialize( void )
{
/*reset counters*/
- asm ("R2 = 0;");
- asm ("CYCLES = R2;");
- asm ("CYCLES2 = R2;");
+ __asm__ ("R2 = 0;");
+ __asm__ ("CYCLES = R2;");
+ __asm__ ("CYCLES2 = R2;");
/*start counters*/
- asm ("R2 = SYSCFG;");
- asm ("BITSET(R2,1);");
- asm ("SYSCFG = R2");
+ __asm__ ("R2 = SYSCFG;");
+ __asm__ ("BITSET(R2,1);");
+ __asm__ ("SYSCFG = R2");
}
@@ -62,13 +62,13 @@ int benchmark_timer_read( void )
{
uint32_t clicks;
uint32_t total;
- register uint32_t cycles asm ("R2");
+ register uint32_t cycles __asm__ ("R2");
/* stop counter */
- asm("R2 = SYSCFG;");
- asm("BITCLR(R2,1);");
- asm("SYSCFG = R2;");
- asm("R2 = CYCLES;");
+ __asm__ ("R2 = SYSCFG;");
+ __asm__ ("BITCLR(R2,1);");
+ __asm__ ("SYSCFG = R2;");
+ __asm__ ("R2 = CYCLES;");
clicks = cycles; /* Clock cycles */