From 5071600b2172b5d37c1f5608f1c623143c651058 Mon Sep 17 00:00:00 2001
From: Sebastian Huber <sebastian.huber@embedded-brains.de>
Date: Tue, 20 Jan 2015 11:04:39 +0100
Subject: Add Xilinx Zynq BSP support

---
 rtemsbsd/include/machine/rtems-bsd-cache.h | 3 +++
 1 file changed, 3 insertions(+)

(limited to 'rtemsbsd/include/machine')

diff --git a/rtemsbsd/include/machine/rtems-bsd-cache.h b/rtemsbsd/include/machine/rtems-bsd-cache.h
index 77cc0794..838f730b 100644
--- a/rtemsbsd/include/machine/rtems-bsd-cache.h
+++ b/rtemsbsd/include/machine/rtems-bsd-cache.h
@@ -27,6 +27,9 @@
 
 #if defined(LIBBSP_ARM_LPC24XX_BSP_H)
   /* No cache */
+#elif defined(LIBBSP_ARM_XILINX_ZYNQ_BSP_H)
+  /* With cache, no coherency support in hardware */
+  #define CPU_DATA_CACHE_ALIGNMENT 32
 #elif defined(LIBBSP_ARM_LPC32XX_BSP_H)
   /* With cache, no coherency support in hardware */
   #include <libcpu/cache.h>
-- 
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