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-rw-r--r--rtemsbsd/include/bsp/nexus-devices.h8
-rw-r--r--rtemsbsd/include/machine/bus.h387
-rw-r--r--rtemsbsd/include/machine/rtems-bsd-commands.h2
-rw-r--r--rtemsbsd/include/machine/rtems-bsd-nexus-bus.h17
-rw-r--r--rtemsbsd/include/machine/rtems-bsd-program.h6
-rw-r--r--rtemsbsd/include/rtems/netcmds-config.h4
-rw-r--r--rtemsbsd/nfsclient/nfs.c89
-rw-r--r--rtemsbsd/powerpc/include/machine/legacyvar.h2
-rw-r--r--rtemsbsd/powerpc/include/machine/pci_cfgreg.h2
-rw-r--r--rtemsbsd/rtems/program-internal.h7
-rw-r--r--rtemsbsd/rtems/rtems-bsd-shell-ifmcstat.c36
-rw-r--r--rtemsbsd/rtems/rtems-kernel-bus-dma.c5
-rw-r--r--rtemsbsd/rtems/rtems-kernel-nexus.c52
-rw-r--r--rtemsbsd/rtems/rtems-program.c51
-rw-r--r--rtemsbsd/sys/dev/atsam/if_atsam.c1170
-rw-r--r--rtemsbsd/sys/dev/nvd/nvd.c37
-rw-r--r--rtemsbsd/sys/net/if_ppp.c11
-rw-r--r--rtemsbsd/sys/net/if_pppvar.h1
-rw-r--r--rtemsbsd/sys/net/ppp_tty.c32
19 files changed, 1179 insertions, 740 deletions
diff --git a/rtemsbsd/include/bsp/nexus-devices.h b/rtemsbsd/include/bsp/nexus-devices.h
index d2ceab8e..86305e9c 100644
--- a/rtemsbsd/include/bsp/nexus-devices.h
+++ b/rtemsbsd/include/bsp/nexus-devices.h
@@ -197,6 +197,12 @@ SYSINIT_DRIVER_REFERENCE(ukphy, miibus);
RTEMS_BSD_DEFINE_NEXUS_DEVICE(fec, 0, 0, NULL);
SYSINIT_DRIVER_REFERENCE(ukphy, miibus);
-#endif
+#elif defined(LIBBSP_POWERPC_MOTOROLA_POWERPC_BSP_H)
+
+RTEMS_BSD_DRIVER_PC_LEGACY;
+RTEMS_BSD_DRIVER_PCI_DC;
+RTEMS_BSD_DRIVER_UKPHY;
+
+#endif /* LIBBSP_POWERPC_MOTOROLA_POWERPC_BSP_H */
#endif
diff --git a/rtemsbsd/include/machine/bus.h b/rtemsbsd/include/machine/bus.h
index 2f0e7ad6..a0c3d63a 100644
--- a/rtemsbsd/include/machine/bus.h
+++ b/rtemsbsd/include/machine/bus.h
@@ -6,9 +6,13 @@
* @brief TODO.
*
* File origin from FreeBSD 'sys/amd64/include/bus.h'.
+ *
+ * Conditionally supports PCI IO regions (IO Ports).
*/
/*-
+ * Copyright (c) 2021 Chris Johns. All rights reserved.
+ *
* Copyright (c) 2009, 2015 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
@@ -25,7 +29,7 @@
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
- *
+ *
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer as
* the first lines of this file unmodified.
@@ -34,7 +38,7 @@
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
@@ -123,9 +127,46 @@
#endif
#ifdef __i386__
- #error "your include paths are wrong"
+ #error "x86 has its own bus.h; check your include paths are correct"
#endif
+#include <bsp.h>
+
+/*
+ * BSP PCI Support
+ *
+ * The RTEMS Nexus bus support can optionaly support PC PCI spaces that
+ * mapped to BSP speciic address spaces. Add the following define to
+ * the BSP header file to enable this support:
+ *
+ * #define BSP_HAS_PC_PCI
+ *
+ * If enabled a BSP must support the following IO region calls:
+ *
+ * inb : read 8 bits
+ * outb : write 8 bits
+ * inw : read 16 bits
+ * outw : write 16 bits
+ * inl : read 32 bits
+ * outl : write 32 bits
+ *
+ * The BSP needs to provide the DRAM address space offset
+ * PCI_DRAM_OFFSET. This is the base address of the DRAM as seen by a
+ * PCI master.
+ *
+ * i386 BSPs have a special bus.h file and do not use this file.
+ */
+
+#ifdef BSP_HAS_PC_PCI
+
+/*
+ * Values for the bus space tag, not to be used directly by MI code.
+ */
+#define BSP_BUS_SPACE_IO 0 /* space is i/o space */
+#define BSP_BUS_SPACE_MEM 1 /* space is mem space */
+
+#endif /* BSP_HAS_PC_PCI */
+
/*
* Bus address alignment.
*/
@@ -144,6 +185,7 @@
/*
* Bus access.
*/
+#define BUS_SPACE_INVALID_DATA (~0U)
#define BUS_SPACE_UNRESTRICTED (~0U)
/*
@@ -223,36 +265,152 @@ bus_space_barrier(bus_space_tag_t bst __unused, bus_space_handle_t bsh, bus_size
}
/*
+ * BSP Bus Space Map Support
+ *
+ * A BSP can provide the following as C macros in the BSP header
+ * (bsp.h) to speicalise for special BSP specific bus operations:
+ *
+ * RTEMS_BSP_READ_1
+ * RTEMS_BSP_READ_2
+ * RTEMS_BSP_READ_4
+ * RTEMS_BSP_READ_8
+ * RTEMS_BSP_WRITE_1
+ * RTEMS_BSP_WRITE_2
+ * RTEMS_BSP_WRITE_4
+ * RTEMS_BSP_WRITE_8
+ */
+
+static __inline uint8_t
+bsp_bus_space_read_1(const uint8_t __volatile *bsp)
+{
+#if defined(RTEMS_BSP_READ_1)
+ return RTEMS_BSP_READ_1(bsp);
+#else
+ return (*bsp);
+#endif
+}
+
+static __inline uint16_t
+bsp_bus_space_read_2(const uint16_t __volatile *bsp)
+{
+#if defined(RTEMS_BSP_READ_2)
+ return RTEMS_BSP_READ_2(bsp);
+#else
+ return (*bsp);
+#endif
+}
+
+static __inline uint32_t
+bsp_bus_space_read_4(const uint32_t __volatile *bsp)
+{
+#if defined(RTEMS_BSP_READ_4)
+ return RTEMS_BSP_READ_4(bsp);
+#else
+ return (*bsp);
+#endif
+}
+
+static __inline uint64_t
+bsp_bus_space_read_8(const uint64_t __volatile *bsp)
+{
+#if defined(RTEMS_BSP_READ_8)
+ return RTEMS_BSP_READ_8(bsp);
+#else
+ return (*bsp);
+#endif
+}
+
+static __inline void
+bsp_bus_space_write_1(uint8_t __volatile *bsp, uint8_t val)
+{
+#if defined(RTEMS_BSP_WRITE_1)
+ RTEMS_BSP_WRITE_1(bsp, val);
+#else
+ *bsp = val;
+#endif
+}
+
+static __inline void
+bsp_bus_space_write_2(uint16_t __volatile *bsp, uint16_t val)
+{
+#if defined(RTEMS_BSP_WRITE_2)
+ RTEMS_BSP_WRITE_2(bsp, val);
+#else
+ *bsp = val;
+#endif
+}
+
+static __inline void
+bsp_bus_space_write_4(uint32_t __volatile *bsp, uint32_t val)
+{
+#if defined(RTEMS_BSP_WRITE_4)
+ RTEMS_BSP_WRITE_4(bsp, val);
+#else
+ *bsp = val;
+#endif
+}
+
+static __inline void
+bsp_bus_space_write_8(uint64_t __volatile *bsp, uint64_t val)
+{
+#if defined(RTEMS_BSP_WRITE_8)
+ RTEMS_BSP_WRITE_8(bsp, val);
+#else
+ *bsp = val;
+#endif
+}
+
+
+/*
* Read 1 unit of data from bus space described by the tag, handle and ofs
* tuple. A unit of data can be 1 byte, 2 bytes, 4 bytes or 8 bytes. The
* data is returned.
*/
static __inline uint8_t
-bus_space_read_1(bus_space_tag_t bst __unused, bus_space_handle_t bsh, bus_size_t ofs)
+bus_space_read_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs)
{
+#ifdef BSP_HAS_PC_PCI
+ if (bst == BSP_BUS_SPACE_IO) {
+ return inb(bsh + ofs);
+ }
+#endif
uint8_t __volatile *bsp = (uint8_t __volatile *)(bsh + ofs);
- return (*bsp);
+ return bsp_bus_space_read_1(bsp);
}
static __inline uint16_t
-bus_space_read_2(bus_space_tag_t bst __unused, bus_space_handle_t bsh, bus_size_t ofs)
+bus_space_read_2(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs)
{
+#ifdef BSP_HAS_PC_PCI
+ if (bst == BSP_BUS_SPACE_IO) {
+ return inw(bsh + ofs);
+ }
+#endif
uint16_t __volatile *bsp = (uint16_t __volatile *)(bsh + ofs);
- return (*bsp);
+ return bsp_bus_space_read_2(bsp);
}
static __inline uint32_t
-bus_space_read_4(bus_space_tag_t bst __unused, bus_space_handle_t bsh, bus_size_t ofs)
+bus_space_read_4(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs)
{
+#ifdef BSP_HAS_PC_PCI
+ if (bst == BSP_BUS_SPACE_IO) {
+ return inl(bsh + ofs);
+ }
+#endif
uint32_t __volatile *bsp = (uint32_t __volatile *)(bsh + ofs);
- return (*bsp);
+ return bsp_bus_space_read_4(bsp);
}
static __inline uint64_t
-bus_space_read_8(bus_space_tag_t bst __unused, bus_space_handle_t bsh, bus_size_t ofs)
+bus_space_read_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs)
{
+#ifdef BSP_HAS_PC_PCI
+ if (bst == BSP_BUS_SPACE_IO)
+ return BUS_SPACE_INVALID_DATA;
+#endif
uint64_t __volatile *bsp = (uint64_t __volatile *)(bsh + ofs);
- return (*bsp);
+ return bsp_bus_space_read_8(bsp);
}
@@ -262,35 +420,58 @@ bus_space_read_8(bus_space_tag_t bst __unused, bus_space_handle_t bsh, bus_size_
* data is passed by value.
*/
static __inline void
-bus_space_write_1(bus_space_tag_t bst __unused, bus_space_handle_t bsh, bus_size_t ofs,
+bus_space_write_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
uint8_t val)
{
+#ifdef BSP_HAS_PC_PCI
+ if (bst == BSP_BUS_SPACE_IO) {
+ outb(val, bsh + ofs);
+ return;
+ }
+#endif
uint8_t __volatile *bsp = (uint8_t __volatile *)(bsh + ofs);
- *bsp = val;
+ bsp_bus_space_write_1(bsp, val);
}
static __inline void
-bus_space_write_2(bus_space_tag_t bst __unused, bus_space_handle_t bsh, bus_size_t ofs,
+bus_space_write_2(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
uint16_t val)
{
+#ifdef BSP_HAS_PC_PCI
+ if (bst == BSP_BUS_SPACE_IO) {
+ outw(val, bsh + ofs);
+ return;
+ }
+#endif
uint16_t __volatile *bsp = (uint16_t __volatile *)(bsh + ofs);
- *bsp = val;
+ bsp_bus_space_write_2(bsp, val);
}
static __inline void
-bus_space_write_4(bus_space_tag_t bst __unused, bus_space_handle_t bsh, bus_size_t ofs,
+bus_space_write_4(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
uint32_t val)
{
+#ifdef BSP_HAS_PC_PCI
+ if (bst == BSP_BUS_SPACE_IO) {
+ outl(val, bsh + ofs);
+ return;
+ }
+#endif
uint32_t __volatile *bsp = (uint32_t __volatile *)(bsh + ofs);
- *bsp = val;
+ bsp_bus_space_write_4(bsp, val);
}
static __inline void
-bus_space_write_8(bus_space_tag_t bst __unused, bus_space_handle_t bsh, bus_size_t ofs,
+bus_space_write_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
uint64_t val)
{
+#ifdef BSP_HAS_PC_PCI
+ if (bst == BSP_BUS_SPACE_IO) {
+ return;
+ }
+#endif
uint64_t __volatile *bsp = (uint64_t __volatile *)(bsh + ofs);
- *bsp = val;
+ bsp_bus_space_write_8(bsp, val);
}
@@ -305,7 +486,7 @@ bus_space_read_multi_1(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
{
uint8_t __volatile *bsp = (uint8_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- *bufp++ = *bsp;
+ *bufp++ = bsp_bus_space_read_1(bsp);
}
}
@@ -315,7 +496,7 @@ bus_space_read_multi_2(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
{
uint16_t __volatile *bsp = (uint16_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- *bufp++ = *bsp;
+ *bufp++ = bsp_bus_space_read_2(bsp);
}
}
@@ -325,7 +506,7 @@ bus_space_read_multi_4(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
{
uint32_t __volatile *bsp = (uint32_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- *bufp++ = *bsp;
+ *bufp++ = bsp_bus_space_read_4(bsp);
}
}
@@ -335,7 +516,7 @@ bus_space_read_multi_8(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
{
uint64_t __volatile *bsp = (uint64_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- *bufp++ = *bsp;
+ *bufp++ = bsp_bus_space_read_8(bsp);
}
}
@@ -351,7 +532,7 @@ bus_space_write_multi_1(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
{
uint8_t __volatile *bsp = (uint8_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- *bsp = *bufp++;
+ bsp_bus_space_write_1(bsp, *bufp++);
}
}
@@ -361,7 +542,7 @@ bus_space_write_multi_2(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
{
uint16_t __volatile *bsp = (uint16_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- *bsp = *bufp++;
+ bsp_bus_space_write_2(bsp, *bufp++);
}
}
@@ -371,7 +552,7 @@ bus_space_write_multi_4(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
{
uint32_t __volatile *bsp = (uint32_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- *bsp = *bufp++;
+ bsp_bus_space_write_4(bsp, *bufp++);
}
}
@@ -381,7 +562,7 @@ bus_space_write_multi_8(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
{
uint64_t __volatile *bsp = (uint64_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- *bsp = *bufp++;
+ bsp_bus_space_write_8(bsp, *bufp++);
}
}
@@ -396,10 +577,9 @@ static __inline void
bus_space_read_region_1(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
bus_size_t ofs, uint8_t *bufp, bus_size_t count)
{
+ uint8_t __volatile *bsp = (uint8_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- uint8_t __volatile *bsp = (uint8_t __volatile *)(bsh + ofs);
- *bufp++ = *bsp;
- ofs += 1;
+ *bufp++ = bsp_bus_space_read_1(bsp++);
}
}
@@ -407,10 +587,9 @@ static __inline void
bus_space_read_region_2(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
bus_size_t ofs, uint16_t *bufp, bus_size_t count)
{
+ uint16_t __volatile *bsp = (uint16_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- uint16_t __volatile *bsp = (uint16_t __volatile *)(bsh + ofs);
- *bufp++ = *bsp;
- ofs += 2;
+ *bufp++ = bsp_bus_space_read_2(bsp++);
}
}
@@ -418,10 +597,9 @@ static __inline void
bus_space_read_region_4(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
bus_size_t ofs, uint32_t *bufp, bus_size_t count)
{
+ uint32_t __volatile *bsp = (uint32_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- uint32_t __volatile *bsp = (uint32_t __volatile *)(bsh + ofs);
- *bufp++ = *bsp;
- ofs += 4;
+ *bufp++ = bsp_bus_space_read_4(bsp++);
}
}
@@ -429,10 +607,9 @@ static __inline void
bus_space_read_region_8(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
bus_size_t ofs, uint64_t *bufp, bus_size_t count)
{
+ uint64_t __volatile *bsp = (uint64_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- uint64_t __volatile *bsp = (uint64_t __volatile *)(bsh + ofs);
- *bufp++ = *bsp;
- ofs += 8;
+ *bufp++ = bsp_bus_space_read_8(bsp++);
}
}
@@ -447,10 +624,9 @@ static __inline void
bus_space_write_region_1(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
bus_size_t ofs, const uint8_t *bufp, bus_size_t count)
{
+ uint8_t __volatile *bsp = (uint8_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- uint8_t __volatile *bsp = (uint8_t __volatile *)(bsh + ofs);
- *bsp = *bufp++;
- ofs += 1;
+ bsp_bus_space_write_1(bsp++, *bufp++);
}
}
@@ -458,10 +634,9 @@ static __inline void
bus_space_write_region_2(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
bus_size_t ofs, const uint16_t *bufp, bus_size_t count)
{
+ uint16_t __volatile *bsp = (uint16_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- uint16_t __volatile *bsp = (uint16_t __volatile *)(bsh + ofs);
- *bsp = *bufp++;
- ofs += 2;
+ bsp_bus_space_write_2(bsp++, *bufp++);
}
}
@@ -469,10 +644,9 @@ static __inline void
bus_space_write_region_4(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
bus_size_t ofs, const uint32_t *bufp, bus_size_t count)
{
+ uint32_t __volatile *bsp = (uint32_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- uint32_t __volatile *bsp = (uint32_t __volatile *)(bsh + ofs);
- *bsp = *bufp++;
- ofs += 4;
+ bsp_bus_space_write_4(bsp++, *bufp++);
}
}
@@ -480,10 +654,9 @@ static __inline void
bus_space_write_region_8(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
bus_size_t ofs, const uint64_t *bufp, bus_size_t count)
{
+ uint64_t __volatile *bsp = (uint64_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- uint64_t __volatile *bsp = (uint64_t __volatile *)(bsh + ofs);
- *bsp = *bufp++;
- ofs += 8;
+ bsp_bus_space_write_8(bsp++, *bufp++);
}
}
@@ -499,7 +672,7 @@ bus_space_set_multi_1(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
{
uint8_t __volatile *bsp = (uint8_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- *bsp = val;
+ bsp_bus_space_write_1(bsp, val);
}
}
@@ -509,7 +682,7 @@ bus_space_set_multi_2(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
{
uint16_t __volatile *bsp = (uint16_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- *bsp = val;
+ bsp_bus_space_write_2(bsp, val);
}
}
@@ -519,7 +692,7 @@ bus_space_set_multi_4(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
{
uint32_t __volatile *bsp = (uint32_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- *bsp = val;
+ bsp_bus_space_write_4(bsp, val);
}
}
@@ -529,7 +702,7 @@ bus_space_set_multi_8(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
{
uint64_t __volatile *bsp = (uint64_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- *bsp = val;
+ bsp_bus_space_write_8(bsp, val);
}
}
@@ -544,10 +717,9 @@ static __inline void
bus_space_set_region_1(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
bus_size_t ofs, uint8_t val, bus_size_t count)
{
+ uint8_t __volatile *bsp = (uint8_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- uint8_t __volatile *bsp = (uint8_t __volatile *)(bsh + ofs);
- *bsp = val;
- ofs += 1;
+ bsp_bus_space_write_1(bsp++, val);
}
}
@@ -555,10 +727,9 @@ static __inline void
bus_space_set_region_2(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
bus_size_t ofs, uint16_t val, bus_size_t count)
{
+ uint16_t __volatile *bsp = (uint16_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- uint16_t __volatile *bsp = (uint16_t __volatile *)(bsh + ofs);
- *bsp = val;
- ofs += 2;
+ bsp_bus_space_write_2(bsp++, val);
}
}
@@ -566,10 +737,9 @@ static __inline void
bus_space_set_region_4(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
bus_size_t ofs, uint32_t val, bus_size_t count)
{
+ uint32_t __volatile *bsp = (uint32_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- uint32_t __volatile *bsp = (uint32_t __volatile *)(bsh + ofs);
- *bsp = val;
- ofs += 4;
+ bsp_bus_space_write_4(bsp++, val);
}
}
@@ -577,10 +747,9 @@ static __inline void
bus_space_set_region_8(bus_space_tag_t bst __unused, bus_space_handle_t bsh,
bus_size_t ofs, uint64_t val, bus_size_t count)
{
+ uint64_t __volatile *bsp = (uint64_t __volatile *)(bsh + ofs);
while (count-- > 0) {
- uint64_t __volatile *bsp = (uint64_t __volatile *)(bsh + ofs);
- *bsp = val;
- ofs += 8;
+ bsp_bus_space_write_8(bsp++, val);
}
}
@@ -596,23 +765,21 @@ static __inline void
bus_space_copy_region_1(bus_space_tag_t bst __unused, bus_space_handle_t bsh1,
bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, bus_size_t count)
{
- bus_addr_t dst = bsh1 + ofs1;
- bus_addr_t src = bsh2 + ofs2;
- uint8_t __volatile *dstp = (uint8_t __volatile *) dst;
- uint8_t __volatile *srcp = (uint8_t __volatile *) src;
+ uint8_t __volatile *dst = (uint8_t __volatile *)(bsh1 + ofs1);
+ uint8_t __volatile *src = (uint8_t __volatile *)(bsh2 + ofs2);
if (dst > src) {
src += count - 1;
dst += count - 1;
while (count-- > 0) {
- *dstp = *srcp;
- src -= 1;
- dst -= 1;
+ bsp_bus_space_write_1(dst, bsp_bus_space_read_1(src));
+ src--;
+ dst--;
}
} else {
while (count-- > 0) {
- *dstp = *srcp;
- src += 1;
- dst += 1;
+ bsp_bus_space_write_1(dst, bsp_bus_space_read_1(src));
+ src++;
+ dst++;
}
}
}
@@ -621,23 +788,21 @@ static __inline void
bus_space_copy_region_2(bus_space_tag_t bst __unused, bus_space_handle_t bsh1,
bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, bus_size_t count)
{
- bus_addr_t dst = bsh1 + ofs1;
- bus_addr_t src = bsh2 + ofs2;
- uint16_t __volatile *dstp = (uint16_t __volatile *) dst;
- uint16_t __volatile *srcp = (uint16_t __volatile *) src;
+ uint16_t __volatile *dst = (uint16_t __volatile *)(bsh1 + ofs1);
+ uint16_t __volatile *src = (uint16_t __volatile *)(bsh2 + ofs2);;
if (dst > src) {
- src += (count - 1) << 1;
- dst += (count - 1) << 1;
+ src += count - 1;
+ dst += count - 1;
while (count-- > 0) {
- *dstp = *srcp;
- src -= 2;
- dst -= 2;
+ bsp_bus_space_write_2(dst, bsp_bus_space_read_2(src));
+ src--;
+ dst--;
}
} else {
while (count-- > 0) {
- *dstp = *srcp;
- src += 2;
- dst += 2;
+ bsp_bus_space_write_2(dst, bsp_bus_space_read_2(src));
+ src++;
+ dst++;
}
}
}
@@ -646,23 +811,21 @@ static __inline void
bus_space_copy_region_4(bus_space_tag_t bst __unused, bus_space_handle_t bsh1,
bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, bus_size_t count)
{
- bus_addr_t dst = bsh1 + ofs1;
- bus_addr_t src = bsh2 + ofs2;
- uint32_t __volatile *dstp = (uint32_t __volatile *) dst;
- uint32_t __volatile *srcp = (uint32_t __volatile *) src;
+ uint32_t __volatile *dst = (uint32_t __volatile *)(bsh1 + ofs1);
+ uint32_t __volatile *src = (uint32_t __volatile *)(bsh2 + ofs2);;
if (dst > src) {
- src += (count - 1) << 2;
- dst += (count - 1) << 2;
+ src += count - 1;
+ dst += count - 1;
while (count-- > 0) {
- *dstp = *srcp;
- src -= 4;
- dst -= 4;
+ bsp_bus_space_write_4(dst, bsp_bus_space_read_4(src));
+ src--;
+ dst--;
}
} else {
while (count-- > 0) {
- *dstp = *srcp;
- src += 4;
- dst += 4;
+ bsp_bus_space_write_4(dst, bsp_bus_space_read_4(src));
+ src++;
+ dst++;
}
}
}
@@ -671,23 +834,21 @@ static __inline void
bus_space_copy_region_8(bus_space_tag_t bst __unused, bus_space_handle_t bsh1,
bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, bus_size_t count)
{
- bus_addr_t dst = bsh1 + ofs1;
- bus_addr_t src = bsh2 + ofs2;
- uint64_t __volatile *dstp = (uint64_t __volatile *) dst;
- uint64_t __volatile *srcp = (uint64_t __volatile *) src;
+ uint64_t __volatile *dst = (uint64_t __volatile *)(bsh1 + ofs1);
+ uint64_t __volatile *src = (uint64_t __volatile *)(bsh2 + ofs2);;
if (dst > src) {
- src += (count - 1) << 3;
- dst += (count - 1) << 3;
+ src += count - 1;
+ dst += count - 1;
while (count-- > 0) {
- *dstp = *srcp;
- src -= 8;
- dst -= 8;
+ bsp_bus_space_write_8(dst, bsp_bus_space_read_8(src));
+ src--;
+ dst--;
}
} else {
while (count-- > 0) {
- *dstp = *srcp;
- src += 8;
- dst += 8;
+ bsp_bus_space_write_8(dst, bsp_bus_space_read_8(src));
+ src++;
+ dst++;
}
}
}
diff --git a/rtemsbsd/include/machine/rtems-bsd-commands.h b/rtemsbsd/include/machine/rtems-bsd-commands.h
index 036734ee..d314471f 100644
--- a/rtemsbsd/include/machine/rtems-bsd-commands.h
+++ b/rtemsbsd/include/machine/rtems-bsd-commands.h
@@ -50,6 +50,8 @@ int rtems_bsd_command_arp(int argc, char **argv);
int rtems_bsd_command_ifconfig(int argc, char **argv);
+int rtems_bsd_command_ifmcstat(int argc, char **argv);
+
int rtems_bsd_command_netstat(int argc, char **argv);
int rtems_bsd_command_nvmecontrol(int argc, char **argv);
diff --git a/rtemsbsd/include/machine/rtems-bsd-nexus-bus.h b/rtemsbsd/include/machine/rtems-bsd-nexus-bus.h
index ff545dc0..c2d71eed 100644
--- a/rtemsbsd/include/machine/rtems-bsd-nexus-bus.h
+++ b/rtemsbsd/include/machine/rtems-bsd-nexus-bus.h
@@ -77,6 +77,7 @@
* RTEMS_BSD_DRIVER_ICSPHY
* RTEMS_BSD_DRIVER_REPHY
* RTEMS_BSD_DRIVER_PHY_MIC
+ * RTEMS_BSD_DRIVER_UKPHY
*/
#if !defined(RTEMS_BSD_NEXUS_BUS_h)
@@ -441,6 +442,14 @@ extern "C" {
SYSINIT_DRIVER_REFERENCE(re, pci);
#endif /* RTEMS_BSD_DRIVER_PCI_RE */
+/*
+ * DEC Tulip Driver
+ */
+#if !defined(RTEMS_BSD_DRIVER_PCI_DC)
+ #define RTEMS_BSD_DRIVER_PCI_DC \
+ SYSINIT_DRIVER_REFERENCE(dc, pci);
+#endif /* RTEMS_BSD_DRIVER_PCI_DC */
+
/**
** MMI Physical Layer Support.
**/
@@ -477,6 +486,14 @@ extern "C" {
SYSINIT_DRIVER_REFERENCE(micphy, miibus);
#endif /* RTEMS_BSD_DRIVER_PHY_MIC */
+/*
+ * UK PHY (for unknown PHY devices)
+ */
+#if !defined(RTEMS_BSD_DRIVER_UKPHY)
+ #define RTEMS_BSD_DRIVER_UKPHY \
+ SYSINIT_DRIVER_REFERENCE(ukphy, miibus);
+#endif /* RTEMS_BSD_DRIVER_UKPHY */
+
#ifdef __cplusplus
}
#endif /* __cplusplus */
diff --git a/rtemsbsd/include/machine/rtems-bsd-program.h b/rtemsbsd/include/machine/rtems-bsd-program.h
index f71ac9cd..96d4bfef 100644
--- a/rtemsbsd/include/machine/rtems-bsd-program.h
+++ b/rtemsbsd/include/machine/rtems-bsd-program.h
@@ -60,6 +60,12 @@ rtems_bsd_program_call_main_with_data_restore(const char *name,
int (*main)(int, char **), int argc, char **argv,
void *data_buf, const size_t data_size);
+void *
+rtems_bsd_program_add_destructor(void (*destructor)(void *), void *arg);
+
+void
+rtems_bsd_program_remove_destructor(void *cookie, bool call);
+
void
rtems_bsd_program_exit(int exit_code) __dead2;
diff --git a/rtemsbsd/include/rtems/netcmds-config.h b/rtemsbsd/include/rtems/netcmds-config.h
index bba2d307..bc493af4 100644
--- a/rtemsbsd/include/rtems/netcmds-config.h
+++ b/rtemsbsd/include/rtems/netcmds-config.h
@@ -30,7 +30,11 @@ extern rtems_shell_cmd_t rtems_shell_PING_Command;
extern rtems_shell_cmd_t rtems_shell_PING6_Command;
extern rtems_shell_cmd_t rtems_shell_IFCONFIG_Command;
+
+extern rtems_shell_cmd_t rtems_shell_IFMCSTAT_Command;
+
extern rtems_shell_cmd_t rtems_shell_ROUTE_Command;
+
extern rtems_shell_cmd_t rtems_shell_NETSTAT_Command;
extern rtems_shell_cmd_t rtems_shell_DHCPCD_Command;
diff --git a/rtemsbsd/nfsclient/nfs.c b/rtemsbsd/nfsclient/nfs.c
index d6f43305..3b8a5925 100644
--- a/rtemsbsd/nfsclient/nfs.c
+++ b/rtemsbsd/nfsclient/nfs.c
@@ -397,71 +397,36 @@ DirInfo dip;
/* Macro for accessing serporid fields
*/
-#define SERP_ARGS(node) ((node)->serporid.serporid_u.serporid.arg_u)
-#define SERP_ATTR(node) ((node)->serporid.serporid_u.serporid.attributes)
-#define SERP_FILE(node) ((node)->serporid.serporid_u.serporid.file)
-
-/*
- * FIXME: The use of the serporid structure with several embedded unions to
- * split up the specific NFS request/response structures is quite a hack. It
- * breaks on 64-bit targets due to the presence of pointer members which affect
- * the overall alignment. Use a packed serporidok structure to hopefully fix
- * this issue.
- */
+#define SERP_ARGS(node) ((node)->serporid.serporid)
+#define SERP_ATTR(node) ((node)->serporid.serporid.attributes)
+#define SERP_FILE(node) ((node)->serporid.serporid.file)
typedef struct serporidok {
fattr attributes;
- nfs_fh file;
union {
- struct {
- filename name;
- } diroparg;
- struct {
- sattr attributes;
- } sattrarg;
- struct {
- uint32_t offset;
- uint32_t count;
- uint32_t totalcount;
- } readarg;
- struct {
- uint32_t beginoffset;
- uint32_t offset;
- uint32_t totalcount;
- struct {
- uint32_t data_len;
- char* data_val;
- } data;
- } writearg;
- struct {
- filename name;
- sattr attributes;
- } createarg;
- struct {
- filename name;
- diropargs to;
- } renamearg;
- struct {
- diropargs to;
- } linkarg;
- struct {
- filename name;
- nfspath to;
- sattr attributes;
- } symlinkarg;
- struct {
- nfscookie cookie;
- uint32_t count;
- } readdirarg;
- } arg_u;
-} RTEMS_PACKED serporidok;
+ nfs_fh file;
+ diropargs diroparg;
+ sattrargs sattrarg;
+ readargs readarg;
+ writeargs writearg;
+ createargs createarg;
+ renameargs renamearg;
+ linkargs linkarg;
+ symlinkargs symlinkarg;
+ readdirargs readdirarg;
+ };
+} serporidok;
+/*
+ * The nfsstat is an enum, so has an integer alignment. The serporid contains
+ * pointers, so has at least a pointer alignment. The packed attribute ensures
+ * that there is no gap between the status and serporid members on 64-bit
+ * targets.
+ */
typedef struct serporid {
nfsstat status;
- union {
- serporidok serporid;
- } serporid_u;
-} serporid;
+ serporidok serporid;
+} RTEMS_PACKED serporid;
/* an XDR routine to encode/decode the inverted diropres
* into an nfsnodestat;
@@ -493,7 +458,7 @@ xdr_serporid(XDR *xdrs, serporid *objp)
return FALSE;
switch (objp->status) {
case NFS_OK:
- if (!xdr_serporidok(xdrs, &objp->serporid_u.serporid))
+ if (!xdr_serporidok(xdrs, &objp->serporid))
return FALSE;
break;
default:
@@ -2040,7 +2005,7 @@ char *dupname;
rtems_clock_get_tod_timeval(&now);
- SERP_ARGS(node).createarg.name = dupname;
+ SERP_ARGS(node).createarg.where.name = dupname;
SERP_ARGS(node).createarg.attributes.mode = mode;
SERP_ARGS(node).createarg.attributes.uid = nfs->uid;
SERP_ARGS(node).createarg.attributes.gid = nfs->gid;
@@ -2134,7 +2099,7 @@ char *dupname;
rtems_clock_get_tod_timeval(&now);
- SERP_ARGS(node).symlinkarg.name = dupname;
+ SERP_ARGS(node).symlinkarg.from.name = dupname;
SERP_ARGS(node).symlinkarg.to = (nfspath) target;
SERP_ARGS(node).symlinkarg.attributes.mode = S_IFLNK | S_IRWXU | S_IRWXG | S_IRWXO;
@@ -2231,7 +2196,7 @@ static int nfs_rename(
nfs_fh *toDirDst = &SERP_ARGS(oldParentNode).renamearg.to.dir;
nfsstat status;
- SERP_ARGS(oldParentNode).renamearg.name = oldNode->str;
+ SERP_ARGS(oldParentNode).renamearg.from.name = oldNode->str;
SERP_ARGS(oldParentNode).renamearg.to.name = dupname;
memcpy(toDirDst, toDirSrc, sizeof(*toDirDst));
diff --git a/rtemsbsd/powerpc/include/machine/legacyvar.h b/rtemsbsd/powerpc/include/machine/legacyvar.h
new file mode 100644
index 00000000..8683a0e5
--- /dev/null
+++ b/rtemsbsd/powerpc/include/machine/legacyvar.h
@@ -0,0 +1,2 @@
+/* See freebsd/sys/x86/include/machine/legacyvar.h */
+#include <x86/include/machine/legacyvar.h>
diff --git a/rtemsbsd/powerpc/include/machine/pci_cfgreg.h b/rtemsbsd/powerpc/include/machine/pci_cfgreg.h
new file mode 100644
index 00000000..1bfa468e
--- /dev/null
+++ b/rtemsbsd/powerpc/include/machine/pci_cfgreg.h
@@ -0,0 +1,2 @@
+/* See freebsd/sys/x86/include/machine/pci_cfgreg.h */
+#include <x86/include/machine/pci_cfgreg.h>
diff --git a/rtemsbsd/rtems/program-internal.h b/rtemsbsd/rtems/program-internal.h
index da817130..2104c064 100644
--- a/rtemsbsd/rtems/program-internal.h
+++ b/rtemsbsd/rtems/program-internal.h
@@ -60,6 +60,12 @@ struct program_allocmem_item {
LIST_ENTRY(program_allocmem_item) entries;
};
+struct program_destructor {
+ void (*destructor)(void *);
+ void *arg;
+ LIST_ENTRY(program_destructor) link;
+};
+
struct rtems_bsd_program_control {
void *context;
int exit_code;
@@ -68,6 +74,7 @@ struct rtems_bsd_program_control {
LIST_HEAD(, program_fd_item) open_fd;
LIST_HEAD(, program_file_item) open_file;
LIST_HEAD(, program_allocmem_item) allocated_mem;
+ LIST_HEAD(, program_destructor) destructors;
};
struct rtems_bsd_program_control *rtems_bsd_program_get_control_or_null(void);
diff --git a/rtemsbsd/rtems/rtems-bsd-shell-ifmcstat.c b/rtemsbsd/rtems/rtems-bsd-shell-ifmcstat.c
new file mode 100644
index 00000000..c8fbd4a1
--- /dev/null
+++ b/rtemsbsd/rtems/rtems-bsd-shell-ifmcstat.c
@@ -0,0 +1,36 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/*
+ * Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <rtems/netcmds-config.h>
+#include <machine/rtems-bsd-commands.h>
+
+rtems_shell_cmd_t rtems_shell_IFMCSTAT_Command = {
+ .name = "ifmcstat",
+ .usage = "ifmcstat [args]",
+ .topic = "net",
+ .command = rtems_bsd_command_ifmcstat
+};
diff --git a/rtemsbsd/rtems/rtems-kernel-bus-dma.c b/rtemsbsd/rtems/rtems-kernel-bus-dma.c
index 8c15e92b..d148e434 100644
--- a/rtemsbsd/rtems/rtems-kernel-bus-dma.c
+++ b/rtemsbsd/rtems/rtems-kernel-bus-dma.c
@@ -247,7 +247,6 @@ bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
if (*vaddr == NULL) {
free(*mapp, M_DEVBUF);
-
return ENOMEM;
}
@@ -288,6 +287,10 @@ bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t segs[],
vm_offset_t vaddr = (vm_offset_t)buf;
int seg;
+#ifdef RTEMS_BSP_PCI_MEM_REGION_BASE
+ vaddr += RTEMS_BSP_PCI_MEM_REGION_BASE;
+#endif
+
lastaddr = *lastaddrp;
bmask = ~(dmat->boundary - 1);
diff --git a/rtemsbsd/rtems/rtems-kernel-nexus.c b/rtemsbsd/rtems/rtems-kernel-nexus.c
index bf840a17..8fc879fe 100644
--- a/rtemsbsd/rtems/rtems-kernel-nexus.c
+++ b/rtemsbsd/rtems/rtems-kernel-nexus.c
@@ -59,9 +59,35 @@
#include <rtems/bsd/bsd.h>
#include <rtems/irq-extension.h>
+#include <bsp.h>
+
+/*
+ * BSP PCI Support
+ *
+ * The RTEMS Nexus bus support can optionaly support PCI spaces that
+ * map to BSP speciic address spaces. The BSP needs to provide the
+ * following:
+ *
+ * RTEMS_BSP_PCI_IO_REGION_BASE
+ * The base address of the IO port region of the address space
+ *
+ * RTEMS_BSP_PCI_MEM_REGION_BASE
+ * The base address of the memory region of the address space
+ *
+ * i386 (x86) BSPs have a special bus.h file and do not use these settings.
+ */
+
/* #define DISABLE_INTERRUPT_EXTENSION */
-#if defined(__i386__) || defined(FDT)
+#if defined(__i386__)
+#define RTEMS_BSP_PCI_IO_REGION_BASE 0
+#endif
+
+#if !defined(RTEMS_BSP_PCI_MEM_REGION_BASE)
+#define RTEMS_BSP_PCI_MEM_REGION_BASE 0
+#endif
+
+#if defined(RTEMS_BSP_PCI_IO_REGION_BASE) || defined(FDT)
#define ENABLE_RESOURCE_ACTIVATE_DEACTIVATE
#endif
@@ -77,7 +103,7 @@ static struct rman mem_rman;
static struct rman irq_rman;
-#ifdef __i386__
+#if defined(RTEMS_BSP_PCI_IO_REGION_BASE)
static struct rman port_rman;
#endif
@@ -111,9 +137,9 @@ nexus_probe(device_t dev)
err = rman_manage_region(&irq_rman, irq_rman.rm_start, irq_rman.rm_end);
BSD_ASSERT(err == 0);
-#ifdef __i386__
+#if defined(RTEMS_BSP_PCI_IO_REGION_BASE)
port_rman.rm_start = 0;
- port_rman.rm_end = 0xffff;
+ port_rman.rm_end = ~0UL;
port_rman.rm_type = RMAN_ARRAY;
port_rman.rm_descr = "I/O ports";
err = rman_init(&port_rman) != 0;
@@ -156,6 +182,7 @@ nexus_alloc_resource(device_t bus, device_t child, int type, int *rid,
struct resource *res = NULL;
struct rman *rm;
const rtems_bsd_device *nd;
+ rman_res_t base = RTEMS_BSP_PCI_MEM_REGION_BASE;
switch (type) {
case SYS_RES_MEMORY:
@@ -164,9 +191,10 @@ nexus_alloc_resource(device_t bus, device_t child, int type, int *rid,
case SYS_RES_IRQ:
rm = &irq_rman;
break;
-#ifdef __i386__
+#if defined(RTEMS_BSP_PCI_IO_REGION_BASE)
case SYS_RES_IOPORT:
rm = &port_rman;
+ base = RTEMS_BSP_PCI_IO_REGION_BASE;
break;
#endif
default:
@@ -185,7 +213,7 @@ nexus_alloc_resource(device_t bus, device_t child, int type, int *rid,
if (res != NULL) {
rman_set_rid(res, *rid);
rman_set_bushandle(res,
- rman_get_start(res));
+ rman_get_start(res) + base);
}
};
@@ -193,7 +221,7 @@ nexus_alloc_resource(device_t bus, device_t child, int type, int *rid,
}
}
-#ifdef __i386__
+#if defined(RTEMS_BSP_PCI_IO_REGION_BASE)
/*
* FIXME: This is a quick and dirty hack. Simply reserve resources of
* this kind. See also pci_reserve_map().
@@ -225,16 +253,22 @@ nexus_activate_resource(device_t bus, device_t child, int type, int rid,
{
switch (type) {
-#ifdef __i386__
+#if defined(RTEMS_BSP_PCI_IO_REGION_BASE)
case SYS_RES_IOPORT:
+#ifdef __i386__
rman_set_bustag(res, X86_BUS_SPACE_IO);
+#else
+ rman_set_bushandle(res,
+ rman_get_start(res) + RTEMS_BSP_PCI_IO_REGION_BASE);
+#endif
break;
#endif
case SYS_RES_MEMORY:
#ifdef __i386__
rman_set_bustag(res, X86_BUS_SPACE_MEM);
#else
- rman_set_bushandle(res, rman_get_start(res));
+ rman_set_bushandle(res,
+ rman_get_start(res) + RTEMS_BSP_PCI_MEM_REGION_BASE);
#endif
break;
}
diff --git a/rtemsbsd/rtems/rtems-program.c b/rtemsbsd/rtems/rtems-program.c
index 204ed248..1ca8e3b9 100644
--- a/rtemsbsd/rtems/rtems-program.c
+++ b/rtemsbsd/rtems/rtems-program.c
@@ -224,6 +224,18 @@ allocmem_free_all(struct rtems_bsd_program_control *prog_ctrl)
}
}
+static void
+call_destructors(struct rtems_bsd_program_control *prog_ctrl)
+{
+ struct program_destructor *node;
+ struct program_destructor *tmp;
+
+ LIST_FOREACH_SAFE(node, &prog_ctrl->destructors, link, tmp) {
+ (*node->destructor)(node->arg);
+ free(node);
+ }
+}
+
int
rtems_bsd_program_call(const char *name, int (*prog)(void *), void *context)
{
@@ -251,6 +263,7 @@ rtems_bsd_program_call(const char *name, int (*prog)(void *), void *context)
LIST_INIT(&prog_ctrl->open_fd);
LIST_INIT(&prog_ctrl->open_file);
LIST_INIT(&prog_ctrl->allocated_mem);
+ LIST_INIT(&prog_ctrl->destructors);
if (setjmp(prog_ctrl->return_context) == 0) {
exit_code = (*prog)(context);
@@ -262,10 +275,48 @@ rtems_bsd_program_call(const char *name, int (*prog)(void *), void *context)
fd_close_all(prog_ctrl);
file_close_all(prog_ctrl);
allocmem_free_all(prog_ctrl);
+ call_destructors(prog_ctrl);
free(prog_ctrl);
return (exit_code);
}
+void *
+rtems_bsd_program_add_destructor(void (*destructor)(void *), void *arg)
+{
+ struct rtems_bsd_program_control *prog_ctrl;
+ struct program_destructor *node;
+
+ prog_ctrl = rtems_bsd_program_get_control_or_null();
+ if (prog_ctrl == NULL) {
+ return (NULL);
+ }
+
+ node = malloc(sizeof(*node));
+ if (node == NULL) {
+ return (NULL);
+ }
+
+ node->destructor = destructor;
+ node->arg = arg;
+ LIST_INSERT_HEAD(&prog_ctrl->destructors, node, link);
+ return (node);
+}
+
+void
+rtems_bsd_program_remove_destructor(void *cookie, bool call)
+{
+ struct program_destructor *node;
+
+ node = cookie;
+ LIST_REMOVE(node, link);
+
+ if (call) {
+ (*node->destructor)(node->arg);
+ }
+
+ free(node);
+}
+
void
rtems_bsd_program_exit(int exit_code)
{
diff --git a/rtemsbsd/sys/dev/atsam/if_atsam.c b/rtemsbsd/sys/dev/atsam/if_atsam.c
index ff8219f4..21a28fcd 100644
--- a/rtemsbsd/sys/dev/atsam/if_atsam.c
+++ b/rtemsbsd/sys/dev/atsam/if_atsam.c
@@ -42,6 +42,7 @@
#include <sys/types.h>
#include <sys/param.h>
#include <sys/mbuf.h>
+#include <sys/sbuf.h>
#include <sys/socket.h>
#include <sys/sockio.h>
#include <sys/kernel.h>
@@ -49,7 +50,9 @@
#include <sys/bus.h>
#include <sys/sysctl.h>
+#include <net/bpf.h>
#include <net/if.h>
+#include <net/if_dl.h>
#include <net/if_var.h>
#include <net/if_types.h>
#include <net/if_media.h>
@@ -66,6 +69,7 @@
#include <rtems/bsd/local/miibus_if.h>
#include <rtems/bsd/if_atsam.h>
+#include <rtems/bsd/bsd.h>
/*
* Number of interfaces supported by the driver
@@ -90,46 +94,40 @@
/** The runtime pin configure list for GMAC */
#define BOARD_GMAC_RUN_PINS BOARD_GMAC_PINS
-/** Multicast Enable */
-#define GMAC_MC_ENABLE (1u << 6)
-#define HASH_INDEX_AMOUNT 6
-#define HASH_ELEMENTS_PER_INDEX 8
-#define MAC_ADDR_MASK 0x0000FFFFFFFFFFFF
-#define MAC_IDX_MASK (1u << 0)
-
-/** Promiscuous Mode Enable */
-#define GMAC_PROM_ENABLE (1u << 4)
-
/** RX Defines */
#define GMAC_RX_BUFFER_SIZE 1536
#define GMAC_RX_BUF_DESC_ADDR_MASK 0xFFFFFFFC
-#define GMAC_RX_SET_OFFSET (1u << 15)
-#define GMAC_RX_SET_USED_WRAP ((1u << 1) | (1u << 0))
-#define GMAC_RX_SET_WRAP (1u << 1)
-#define GMAC_RX_SET_USED (1u << 0)
-/** TX Defines */
-#define GMAC_TX_SET_EOF (1u << 15)
-#define GMAC_TX_SET_WRAP (1u << 30)
-#define GMAC_TX_SET_USED (1u << 31)
#define GMAC_DESCRIPTOR_ALIGNMENT 8
/** Events */
#define ATSAMV7_ETH_RX_EVENT_INTERRUPT RTEMS_EVENT_1
-#define ATSAMV7_ETH_TX_EVENT_INTERRUPT RTEMS_EVENT_2
-#define ATSAMV7_ETH_START_TRANSMIT_EVENT RTEMS_EVENT_3
-
-#define ATSAMV7_ETH_RX_DATA_OFFSET 2
-
-#define WATCHDOG_TIMEOUT 5
/* FIXME: Make these configurable */
#define MDIO_RETRIES 10
#define MDIO_PHY MII_PHY_ANY
-#define RXBUF_COUNT 8
-#define TXBUF_COUNT 64
#define IGNORE_RX_ERR false
+#define RX_INTERRUPTS (GMAC_ISR_RCOMP | GMAC_ISR_RXUBR | GMAC_ISR_ROVR)
+
+#define RX_DESC_LOG2 3
+#define RX_DESC_COUNT (1U << RX_DESC_LOG2)
+#define RX_DESC_WRAP(idx) \
+ ((((idx) + 1) & RX_DESC_COUNT) >> (RX_DESC_LOG2 - 1))
+RTEMS_STATIC_ASSERT(RX_DESC_WRAP(RX_DESC_COUNT - 1) ==
+ GMAC_RX_WRAP_BIT, rx_desc_wrap);
+RTEMS_STATIC_ASSERT(RX_DESC_WRAP(RX_DESC_COUNT - 2) ==
+ 0, rx_desc_no_wrap);
+
+#define TX_DESC_LOG2 6
+#define TX_DESC_COUNT (1U << TX_DESC_LOG2)
+#define TX_DESC_WRAP(idx) \
+ ((((idx) + 1) & TX_DESC_COUNT) << (30 - TX_DESC_LOG2))
+RTEMS_STATIC_ASSERT(TX_DESC_WRAP(TX_DESC_COUNT - 1) ==
+ GMAC_TX_WRAP_BIT, tx_desc_wrap);
+RTEMS_STATIC_ASSERT(TX_DESC_WRAP(TX_DESC_COUNT - 2) ==
+ 0, tx_desc_no_wrap);
+
/** The PINs for GMAC */
static const Pin gmacPins[] = { BOARD_GMAC_RUN_PINS };
@@ -139,11 +137,13 @@ typedef struct if_atsam_gmac {
uint32_t retries;
} if_atsam_gmac;
-typedef struct ring_buffer {
- unsigned tx_bd_used;
- unsigned tx_bd_free;
- size_t length;
-} ring_buffer;
+struct if_atsam_tx_bds {
+ volatile sGmacTxDescriptor bds[TX_DESC_COUNT];
+};
+
+struct if_atsam_rx_bds {
+ volatile sGmacRxDescriptor bds[RX_DESC_COUNT];
+};
/*
* Per-device data
@@ -156,17 +156,16 @@ typedef struct if_atsam_softc {
struct ifnet *ifp;
struct mtx mtx;
if_atsam_gmac Gmac_inst;
+ size_t tx_idx_head;
+ size_t tx_idx_tail;
+ struct if_atsam_tx_bds *tx;
+ struct mbuf *tx_mbufs[TX_DESC_COUNT];
+ size_t rx_idx_head;
+ struct if_atsam_rx_bds *rx;
+ struct mbuf *rx_mbufs[RX_DESC_COUNT];
uint8_t GMacAddress[6];
rtems_id rx_daemon_tid;
- rtems_id tx_daemon_tid;
rtems_vector_number interrupt_number;
- struct mbuf **rx_mbuf;
- struct mbuf **tx_mbuf;
- volatile sGmacTxDescriptor *tx_bd_base;
- size_t rx_bd_fill_idx;
- size_t amount_rx_buf;
- size_t amount_tx_buf;
- ring_buffer tx_ring;
struct callout tick_ch;
/*
@@ -190,13 +189,12 @@ typedef struct if_atsam_softc {
struct if_atsam_stats {
/* Software */
uint32_t rx_overrun_errors;
+ uint32_t rx_used_bit_reads;
uint32_t rx_interrupts;
- uint32_t tx_complete_int;
uint32_t tx_tur_errors;
uint32_t tx_rlex_errors;
uint32_t tx_tfc_errors;
uint32_t tx_hresp_errors;
- uint32_t tx_interrupts;
/* Hardware */
uint64_t octets_transm;
@@ -243,6 +241,8 @@ typedef struct if_atsam_softc {
uint32_t tcp_checksum_errors;
uint32_t udp_checksum_errors;
} stats;
+
+ int if_flags;
} if_atsam_softc;
static void if_atsam_poll_hw_stats(struct if_atsam_softc *sc);
@@ -251,27 +251,6 @@ static void if_atsam_poll_hw_stats(struct if_atsam_softc *sc);
#define IF_ATSAM_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
-static void if_atsam_event_send(rtems_id task, rtems_event_set event)
-{
- rtems_event_send(task, event);
-}
-
-
-static void if_atsam_event_receive(if_atsam_softc *sc, rtems_event_set in)
-{
- rtems_event_set out;
-
- IF_ATSAM_UNLOCK(sc);
- rtems_event_receive(
- in,
- RTEMS_EVENT_ANY | RTEMS_WAIT,
- RTEMS_NO_TIMEOUT,
- &out
- );
- IF_ATSAM_LOCK(sc);
-}
-
-
static struct mbuf *if_atsam_new_mbuf(struct ifnet *ifp)
{
struct mbuf *m;
@@ -356,11 +335,10 @@ if_atsam_miibus_readreg(device_t dev, int phy, int reg)
static int
if_atsam_miibus_writereg(device_t dev, int phy, int reg, int data)
{
- uint8_t err;
if_atsam_softc *sc = device_get_softc(dev);
IF_ATSAM_LOCK(sc);
- err = if_atsam_write_phy(sc->Gmac_inst.gGmacd.pHw,
+ (void)if_atsam_write_phy(sc->Gmac_inst.gGmacd.pHw,
(uint8_t)phy, (uint8_t)reg, data, sc->Gmac_inst.retries);
IF_ATSAM_UNLOCK(sc);
@@ -403,63 +381,53 @@ if_atsam_init_phy(if_atsam_gmac *gmac_inst, uint32_t mck,
static void if_atsam_interrupt_handler(void *arg)
{
if_atsam_softc *sc = (if_atsam_softc *)arg;
- uint32_t irq_status_val;
- rtems_event_set rx_event = 0;
- rtems_event_set tx_event = 0;
Gmac *pHw = sc->Gmac_inst.gGmacd.pHw;
+ uint32_t is;
/* Get interrupt status */
- irq_status_val = GMAC_GetItStatus(pHw, 0);
+ is = pHw->GMAC_ISR;
- /* Check receive interrupts */
- if ((irq_status_val & GMAC_IER_ROVR) != 0) {
- ++sc->stats.rx_overrun_errors;
- rx_event = ATSAMV7_ETH_RX_EVENT_INTERRUPT;
- }
- if ((irq_status_val & GMAC_IER_RCOMP) != 0) {
- rx_event = ATSAMV7_ETH_RX_EVENT_INTERRUPT;
+ if (__predict_false((is & GMAC_TX_ERR_BIT) != 0)) {
+ if ((is & GMAC_IER_TUR) != 0) {
+ ++sc->stats.tx_tur_errors;
+ }
+ if ((is & GMAC_IER_RLEX) != 0) {
+ ++sc->stats.tx_rlex_errors;
+ }
+ if ((is & GMAC_IER_TFC) != 0) {
+ ++sc->stats.tx_tfc_errors;
+ }
+ if ((is & GMAC_IER_HRESP) != 0) {
+ ++sc->stats.tx_hresp_errors;
+ }
}
- /* Send events to receive task and switch off rx interrupts */
- if (rx_event != 0) {
+
+ /* Check receive interrupts */
+ if (__predict_true((is & RX_INTERRUPTS) != 0)) {
+ if (__predict_false((is & GMAC_ISR_RXUBR) != 0)) {
+ ++sc->stats.rx_used_bit_reads;
+ }
+
+ if (__predict_false((is & GMAC_ISR_ROVR) != 0)) {
+ ++sc->stats.rx_overrun_errors;
+ }
+
++sc->stats.rx_interrupts;
- /* Erase the interrupts for RX completion and errors */
- GMAC_DisableIt(pHw, GMAC_IER_RCOMP | GMAC_IER_ROVR, 0);
- (void)if_atsam_event_send(sc->rx_daemon_tid, rx_event);
- }
- if ((irq_status_val & GMAC_IER_TUR) != 0) {
- ++sc->stats.tx_tur_errors;
- tx_event = ATSAMV7_ETH_TX_EVENT_INTERRUPT;
- }
- if ((irq_status_val & GMAC_IER_RLEX) != 0) {
- ++sc->stats.tx_rlex_errors;
- tx_event = ATSAMV7_ETH_TX_EVENT_INTERRUPT;
- }
- if ((irq_status_val & GMAC_IER_TFC) != 0) {
- ++sc->stats.tx_tfc_errors;
- tx_event = ATSAMV7_ETH_TX_EVENT_INTERRUPT;
- }
- if ((irq_status_val & GMAC_IER_HRESP) != 0) {
- ++sc->stats.tx_hresp_errors;
- tx_event = ATSAMV7_ETH_TX_EVENT_INTERRUPT;
- }
- if ((irq_status_val & GMAC_IER_TCOMP) != 0) {
- ++sc->stats.tx_complete_int;
- tx_event = ATSAMV7_ETH_TX_EVENT_INTERRUPT;
- }
- /* Send events to transmit task and switch off tx interrupts */
- if (tx_event != 0) {
- ++sc->stats.tx_interrupts;
- /* Erase the interrupts for TX completion and errors */
- GMAC_DisableIt(pHw, GMAC_INT_TX_BITS, 0);
- (void)if_atsam_event_send(sc->tx_daemon_tid, tx_event);
+
+ /* Disable RX interrupts */
+ pHw->GMAC_IDR = RX_INTERRUPTS;
+
+ (void)rtems_event_send(sc->rx_daemon_tid,
+ ATSAMV7_ETH_RX_EVENT_INTERRUPT);
}
}
-static void rx_update_mbuf(struct mbuf *m, sGmacRxDescriptor *buffer_desc)
+static void
+if_atsam_rx_update_mbuf(struct mbuf *m, uint32_t status)
{
int frame_len;
- frame_len = (int) (buffer_desc->status.bm.len);
+ frame_len = (int)(status & GMAC_LENGTH_FRAME);
m->m_data = mtod(m, char*)+ETHER_ALIGN;
m->m_len = frame_len;
@@ -467,7 +435,7 @@ static void rx_update_mbuf(struct mbuf *m, sGmacRxDescriptor *buffer_desc)
/* check checksum offload result */
m->m_pkthdr.csum_flags = 0;
- switch (buffer_desc->status.bm.typeIDMatchOrCksumResult) {
+ switch ((status >> 22) & 0x3) {
case GMAC_RXDESC_ST_CKSUM_RESULT_IP_CHECKED:
m->m_pkthdr.csum_flags = CSUM_IP_CHECKED | CSUM_IP_VALID;
m->m_pkthdr.csum_data = 0xffff;
@@ -481,21 +449,17 @@ static void rx_update_mbuf(struct mbuf *m, sGmacRxDescriptor *buffer_desc)
}
}
-/*
- * Receive daemon
- */
-static void if_atsam_rx_daemon(void *arg)
+static void
+if_atsam_rx_daemon(rtems_task_argument arg)
{
if_atsam_softc *sc = (if_atsam_softc *)arg;
struct ifnet *ifp = sc->ifp;
- rtems_event_set events = 0;
- void *rx_bd_base;
- struct mbuf *m;
- struct mbuf *n;
- volatile sGmacRxDescriptor *buffer_desc;
- uint32_t tmp_rx_bd_address;
- size_t i;
+ volatile sGmacRxDescriptor *base;
+ struct if_atsam_rx_bds *rx;
Gmac *pHw = sc->Gmac_inst.gGmacd.pHw;
+ size_t idx;
+ struct mbuf **mbufs;
+ struct mbuf *m;
IF_ATSAM_LOCK(sc);
@@ -506,47 +470,37 @@ static void if_atsam_rx_daemon(void *arg)
}
/* Allocate memory space for priority queue descriptor list */
- rx_bd_base = rtems_cache_coherent_allocate(sizeof(sGmacRxDescriptor),
+ base = rtems_cache_coherent_allocate(sizeof(*base),
GMAC_DESCRIPTOR_ALIGNMENT, 0);
- assert(rx_bd_base != NULL);
+ assert(base != NULL);
- buffer_desc = (sGmacRxDescriptor *)rx_bd_base;
- buffer_desc->addr.val = GMAC_RX_SET_USED_WRAP;
- buffer_desc->status.val = 0;
+ base->addr.val = GMAC_RX_OWNERSHIP_BIT | GMAC_RX_WRAP_BIT;
+ base->status.val = 0;
- GMAC_SetRxQueue(pHw, (uint32_t)buffer_desc, 1);
- GMAC_SetRxQueue(pHw, (uint32_t)buffer_desc, 2);
+ GMAC_SetRxQueue(pHw, (uint32_t)base, 1);
+ GMAC_SetRxQueue(pHw, (uint32_t)base, 2);
/* Allocate memory space for buffer descriptor list */
- rx_bd_base = rtems_cache_coherent_allocate(
- sc->amount_rx_buf * sizeof(sGmacRxDescriptor),
+ rx = rtems_cache_coherent_allocate(sizeof(*rx),
GMAC_DESCRIPTOR_ALIGNMENT, 0);
- assert(rx_bd_base != NULL);
- buffer_desc = (sGmacRxDescriptor *)rx_bd_base;
+ assert(rx != NULL);
+ sc->rx = rx;
+ mbufs = &sc->rx_mbufs[0];
/* Create descriptor list and mark as empty */
- for (sc->rx_bd_fill_idx = 0; sc->rx_bd_fill_idx < sc->amount_rx_buf;
- ++sc->rx_bd_fill_idx) {
+ for (idx = 0; idx < RX_DESC_COUNT; ++idx) {
m = if_atsam_new_mbuf(ifp);
assert(m != NULL);
- sc->rx_mbuf[sc->rx_bd_fill_idx] = m;
- buffer_desc->addr.val = ((uint32_t)m->m_data) &
- GMAC_RX_BUF_DESC_ADDR_MASK;
- buffer_desc->status.val = 0;
- if (sc->rx_bd_fill_idx == (sc->amount_rx_buf - 1)) {
- buffer_desc->addr.bm.bWrap = 1;
- } else {
- buffer_desc++;
- }
+ mbufs[idx] = m;
+ rx->bds[idx].addr.val = mtod(m, uint32_t) | RX_DESC_WRAP(idx);
}
- buffer_desc = (sGmacRxDescriptor *)rx_bd_base;
/* Set 2 Byte Receive Buffer Offset */
- pHw->GMAC_NCFGR |= GMAC_RX_SET_OFFSET;
+ pHw->GMAC_NCFGR |= GMAC_NCFGR_RXBUFO(2);
/* Write Buffer Queue Base Address Register */
GMAC_ReceiveEnable(pHw, 0);
- GMAC_SetRxQueue(pHw, (uint32_t)buffer_desc, 0);
+ GMAC_SetRxQueue(pHw, (uint32_t)&rx->bds[0], 0);
/* Set address for address matching */
GMAC_SetAddress(pHw, 0, sc->GMacAddress);
@@ -554,306 +508,230 @@ static void if_atsam_rx_daemon(void *arg)
/* Enable Receiving of data */
GMAC_ReceiveEnable(pHw, 1);
- /* Setup the interrupts for RX completion and errors */
- GMAC_EnableIt(pHw, GMAC_IER_RCOMP | GMAC_IER_ROVR, 0);
+ IF_ATSAM_UNLOCK(sc);
- sc->rx_bd_fill_idx = 0;
+ idx = 0;
while (true) {
- /* Wait for events */
- if_atsam_event_receive(sc, ATSAMV7_ETH_RX_EVENT_INTERRUPT);
+ rtems_event_set out;
- /*
- * Check for all packets with a set ownership bit
- */
- while (buffer_desc->addr.bm.bOwnership == 1) {
- if (buffer_desc->status.bm.bEof == 1) {
- m = sc->rx_mbuf[sc->rx_bd_fill_idx];
+ sc->rx_idx_head = idx;
- /* New mbuf for desc */
- n = if_atsam_new_mbuf(ifp);
- if (n != NULL) {
- rx_update_mbuf(m, buffer_desc);
+ /* Enable RX interrupts */
+ pHw->GMAC_IER = RX_INTERRUPTS;
- IF_ATSAM_UNLOCK(sc);
- sc->ifp->if_input(ifp, m);
- IF_ATSAM_LOCK(sc);
- m = n;
- } else {
- (void)if_atsam_event_send(
- sc->tx_daemon_tid, ATSAMV7_ETH_START_TRANSMIT_EVENT);
- }
- sc->rx_mbuf[sc->rx_bd_fill_idx] = m;
- tmp_rx_bd_address = (uint32_t)m->m_data &
- GMAC_RX_BUF_DESC_ADDR_MASK;
-
- /* Switch pointer to next buffer descriptor */
- if (sc->rx_bd_fill_idx ==
- (sc->amount_rx_buf - 1)) {
- tmp_rx_bd_address |= GMAC_RX_SET_WRAP;
- sc->rx_bd_fill_idx = 0;
- } else {
- ++sc->rx_bd_fill_idx;
- }
+ (void) rtems_event_receive(ATSAMV7_ETH_RX_EVENT_INTERRUPT,
+ RTEMS_EVENT_ALL | RTEMS_WAIT, RTEMS_NO_TIMEOUT, &out);
- /*
- * Give ownership to GMAC for further processing
- */
- tmp_rx_bd_address &= ~GMAC_RX_SET_USED;
- _ARM_Data_synchronization_barrier();
- buffer_desc->addr.val = tmp_rx_bd_address;
+ while (true) {
+ uint32_t addr;
+ uint32_t status;
- buffer_desc = (sGmacRxDescriptor *)rx_bd_base
- + sc->rx_bd_fill_idx;
+ addr = rx->bds[idx].addr.val;
+ if ((addr & GMAC_RX_OWNERSHIP_BIT) == 0) {
+ break;
}
- }
- /* Setup the interrupts for RX completion and errors */
- GMAC_EnableIt(pHw, GMAC_IER_RCOMP | GMAC_IER_ROVR, 0);
- }
-}
-/*
- * Update of current transmit buffer position.
- */
-static void if_atsam_tx_bd_pos_update(size_t *pos, size_t amount_tx_buf)
-{
- *pos = (*pos + 1) % amount_tx_buf;
-}
+ status = rx->bds[idx].status.val;
+ m = mbufs[idx];
-/*
- * Is RingBuffer empty
- */
-static bool if_atsam_ring_buffer_empty(ring_buffer *ring_buffer)
-{
- return (ring_buffer->tx_bd_used == ring_buffer->tx_bd_free);
-}
+ if (__predict_true((status & GMAC_RX_EOF_BIT) != 0)) {
+ struct mbuf *n;
-/*
- * Is RingBuffer full
- */
-static bool if_atsam_ring_buffer_full(ring_buffer *ring_buffer)
-{
- size_t tx_bd_used_next = ring_buffer->tx_bd_used;
+ n = if_atsam_new_mbuf(ifp);
+ if (n != NULL) {
+ if_atsam_rx_update_mbuf(m, status);
+ (*ifp->if_input)(ifp, m);
+ m = n;
+ }
+ } else {
+ if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
+ }
- if_atsam_tx_bd_pos_update(&tx_bd_used_next, ring_buffer->length);
- return (tx_bd_used_next == ring_buffer->tx_bd_free);
-}
+ mbufs[idx] = m;
+ rx->bds[idx].addr.val = mtod(m, uint32_t) |
+ RX_DESC_WRAP(idx);
-/*
- * Cleanup transmit file descriptors by freeing mbufs which are not needed any
- * longer due to correct transmission.
- */
-static void if_atsam_tx_bd_cleanup(if_atsam_softc *sc)
-{
- struct mbuf *m;
- volatile sGmacTxDescriptor *cur;
- bool eof_needed = false;
-
- while (!if_atsam_ring_buffer_empty(&sc->tx_ring)){
- cur = sc->tx_bd_base + sc->tx_ring.tx_bd_free;
- if (((cur->status.bm.bUsed == 1) && !eof_needed) || eof_needed) {
- eof_needed = true;
- cur->status.val |= GMAC_TX_SET_USED;
- m = sc->tx_mbuf[sc->tx_ring.tx_bd_free];
- m_free(m);
- sc->tx_mbuf[sc->tx_ring.tx_bd_free] = 0;
- if_atsam_tx_bd_pos_update(&sc->tx_ring.tx_bd_free,
- sc->tx_ring.length);
- if (cur->status.bm.bLastBuffer) {
- eof_needed = false;
- }
- } else {
- break;
+ idx = (idx + 1) % RX_DESC_COUNT;
}
}
}
-/*
- * Prepare Ethernet frame to start transmission.
- */
-static bool if_atsam_send_packet(if_atsam_softc *sc, struct mbuf *m)
+static void
+if_atsam_tx_reclaim(struct if_atsam_softc *sc, struct ifnet *ifp)
{
- volatile sGmacTxDescriptor *cur;
- volatile sGmacTxDescriptor *start_packet_tx_bd = 0;
- int pos = 0;
- uint32_t tmp_val = 0;
- Gmac *pHw = sc->Gmac_inst.gGmacd.pHw;
- bool success;
- int csum_flags = m->m_pkthdr.csum_flags;
+ uint32_t head_idx;
+ uint32_t tail_idx;
+ volatile sGmacTxDescriptor *base;
- if_atsam_tx_bd_cleanup(sc);
- /* Wait for interrupt in case no buffer descriptors are available */
- /* Wait for events */
- while (true) {
- if (if_atsam_ring_buffer_full(&sc->tx_ring)) {
- /* Setup the interrupts for TX completion and errors */
- GMAC_EnableIt(pHw, GMAC_INT_TX_BITS, 0);
- success = false;
+ head_idx = sc->tx_idx_head;
+ tail_idx = sc->tx_idx_tail;
+ base = &sc->tx->bds[0];
+
+ while (head_idx != tail_idx) {
+ uint32_t status;
+ ift_counter cnt;
+ struct mbuf *m;
+
+ status = base[tail_idx].status.val;
+
+ if ((status & GMAC_TX_USED_BIT) == 0) {
break;
}
- /*
- * Get current mbuf for data fill
- */
- cur = &sc->tx_bd_base[sc->tx_ring.tx_bd_used];
- /* Set the transfer data */
- if (m->m_len) {
- uintptr_t cache_adjustment = mtod(m, uintptr_t) % 32;
-
- rtems_cache_flush_multiple_data_lines(
- mtod(m, const char *) - cache_adjustment,
- (size_t)(m->m_len + cache_adjustment));
-
- cur->addr = mtod(m, uint32_t);
- tmp_val = (uint32_t)m->m_len | GMAC_TX_SET_USED;
- if (sc->tx_ring.tx_bd_used == (sc->tx_ring.length - 1)) {
- tmp_val |= GMAC_TX_SET_WRAP;
- }
- if (pos == 0) {
- start_packet_tx_bd = cur;
- }
- sc->tx_mbuf[sc->tx_ring.tx_bd_used] = m;
- m = m->m_next;
- if_atsam_tx_bd_pos_update(&sc->tx_ring.tx_bd_used,
- sc->tx_ring.length);
+ if (__predict_true((status & GMAC_TX_ERR_BITS) == 0)) {
+ cnt = IFCOUNTER_OPACKETS;
} else {
- /* Discard empty mbufs */
- m = m_free(m);
+ cnt = IFCOUNTER_OERRORS;
}
- /*
- * Send out the buffer once the complete mbuf_chain has been
- * processed
- */
- if (m == NULL) {
- tmp_val |= GMAC_TX_SET_EOF;
- tmp_val &= ~GMAC_TX_SET_USED;
- if ((csum_flags & (CSUM_IP | CSUM_TCP | CSUM_UDP |
- CSUM_TCP_IPV6 | CSUM_UDP_IPV6)) != 0) {
- start_packet_tx_bd->status.bm.bNoCRC = 0;
- } else {
- start_packet_tx_bd->status.bm.bNoCRC = 1;
- }
- _ARM_Data_synchronization_barrier();
- cur->status.val = tmp_val;
- start_packet_tx_bd->status.val &= ~GMAC_TX_SET_USED;
- _ARM_Data_synchronization_barrier();
- GMAC_TransmissionStart(pHw);
- success = true;
- break;
- } else {
- if (pos > 0) {
- tmp_val &= ~GMAC_TX_SET_USED;
+ while ((m = sc->tx_mbufs[tail_idx]) == NULL ) {
+ base[tail_idx].status.val = status | GMAC_TX_USED_BIT;
+ tail_idx = (tail_idx + 1) % TX_DESC_COUNT;
+ status = base[tail_idx].status.val;
+
+ if (__predict_false((status & GMAC_TX_ERR_BITS) != 0)) {
+ cnt = IFCOUNTER_OERRORS;
}
- pos++;
- cur->status.val = tmp_val;
}
+
+ base[tail_idx].status.val = status | GMAC_TX_USED_BIT;
+ if_inc_counter(ifp, cnt, 1);
+ sc->tx_mbufs[tail_idx] = NULL;
+ m_freem(m);
+
+ tail_idx = (tail_idx + 1) % TX_DESC_COUNT;
}
- return success;
-}
+ sc->tx_idx_tail = tail_idx;
+}
-/*
- * Transmit daemon
- */
-static void if_atsam_tx_daemon(void *arg)
+static void
+if_atsam_cache_flush(uintptr_t begin, uintptr_t size)
{
- if_atsam_softc *sc = (if_atsam_softc *)arg;
- rtems_event_set events = 0;
- sGmacTxDescriptor *buffer_desc;
- int bd_number;
- void *tx_bd_base;
- struct mbuf *m;
- bool success;
+ uintptr_t end;
+ uintptr_t mask;
+
+ /* Align begin and end of the data to a cache line */
+ end = begin + size;
+ mask = CPU_CACHE_LINE_BYTES - 1;
+ begin &= ~mask;
+ end = (end + mask) & ~mask;
+ rtems_cache_flush_multiple_data_lines((void *)begin, end - begin);
+}
- IF_ATSAM_LOCK(sc);
+static int
+if_atsam_tx_enqueue(struct if_atsam_softc *sc, struct ifnet *ifp, struct mbuf *m)
+{
+ size_t head_idx;
+ size_t tail_idx;
+ size_t capacity;
+ size_t idx;
+ volatile sGmacTxDescriptor *base;
+ volatile sGmacTxDescriptor *desc;
+ size_t bufs;
+ uint32_t status;
+ struct mbuf *n;
- Gmac *pHw = sc->Gmac_inst.gGmacd.pHw;
- struct ifnet *ifp = sc->ifp;
+ head_idx = sc->tx_idx_head;
+ tail_idx = sc->tx_idx_tail;
+ capacity = (tail_idx - head_idx - 1) % TX_DESC_COUNT;
- GMAC_TransmitEnable(pHw, 0);
+ idx = head_idx;
+ base = &sc->tx->bds[0];
+ bufs = 0;
+ n = m;
- /* Allocate memory space for priority queue descriptor list */
- tx_bd_base = rtems_cache_coherent_allocate(sizeof(sGmacTxDescriptor),
- GMAC_DESCRIPTOR_ALIGNMENT, 0);
- assert(tx_bd_base != NULL);
+ do {
+ uint32_t size;
- buffer_desc = (sGmacTxDescriptor *)tx_bd_base;
- buffer_desc->addr = 0;
- buffer_desc->status.val = GMAC_TX_SET_USED | GMAC_TX_SET_WRAP;
+ desc = &base[idx];
- GMAC_SetTxQueue(pHw, (uint32_t)buffer_desc, 1);
- GMAC_SetTxQueue(pHw, (uint32_t)buffer_desc, 2);
+ size = (uint32_t)n->m_len;
+ if (__predict_true(size > 0)) {
+ uintptr_t begin;
- /* Allocate memory space for buffer descriptor list */
- tx_bd_base = rtems_cache_coherent_allocate(
- sc->amount_tx_buf * sizeof(sGmacTxDescriptor),
- GMAC_DESCRIPTOR_ALIGNMENT, 0);
- assert(tx_bd_base != NULL);
- buffer_desc = (sGmacTxDescriptor *)tx_bd_base;
+ ++bufs;
+ if (__predict_false(bufs > capacity)) {
+ return (ENOBUFS);
+ }
- /* Create descriptor list and mark as empty */
- for (bd_number = 0; bd_number < sc->amount_tx_buf; bd_number++) {
- buffer_desc->addr = 0;
- buffer_desc->status.val = GMAC_TX_SET_USED;
- if (bd_number == (sc->amount_tx_buf - 1)) {
- buffer_desc->status.bm.bWrap = 1;
- } else {
- buffer_desc++;
+ begin = mtod(n, uintptr_t);
+ desc->addr = (uint32_t)begin;
+ status = GMAC_TX_USED_BIT | TX_DESC_WRAP(idx) | size;
+ desc->status.val = status;
+ if_atsam_cache_flush(begin, size);
+ idx = (idx + 1) % TX_DESC_COUNT;
}
+
+ n = n->m_next;
+ } while (n != NULL);
+
+ sc->tx_idx_head = idx;
+
+ idx = (idx - 1) % TX_DESC_COUNT;
+ desc = &base[idx];
+ sc->tx_mbufs[idx] = m;
+ status = GMAC_TX_LAST_BUFFER_BIT;
+
+ while (idx != head_idx) {
+ desc->status.val = (desc->status.val & ~GMAC_TX_USED_BIT) |
+ status;
+ status = 0;
+
+ idx = (idx - 1) % TX_DESC_COUNT;
+ desc = &base[idx];
}
- buffer_desc = (sGmacTxDescriptor *)tx_bd_base;
- /* Write Buffer Queue Base Address Register */
- GMAC_SetTxQueue(pHw, (uint32_t)buffer_desc, 0);
+ desc->status.val = (desc->status.val & ~GMAC_TX_USED_BIT) | status;
+ _ARM_Data_synchronization_barrier();
+ sc->Gmac_inst.gGmacd.pHw->GMAC_NCR |= GMAC_NCR_TSTART;
+ ETHER_BPF_MTAP(ifp, m);
+ return (0);
+}
- /* Enable Transmission of data */
- GMAC_TransmitEnable(pHw, 1);
+static int
+if_atsam_transmit(struct ifnet *ifp, struct mbuf *m)
+{
+ struct if_atsam_softc *sc;
+ int error;
- /* Set variables in context */
- sc->tx_bd_base = tx_bd_base;
+ if (__predict_false((m->m_flags & M_VLANTAG) != 0)) {
+ struct mbuf *n;
- while (true) {
- /* Wait for events */
- if_atsam_event_receive(sc,
- ATSAMV7_ETH_START_TRANSMIT_EVENT |
- ATSAMV7_ETH_TX_EVENT_INTERRUPT);
- //printf("TX Transmit Event received\n");
-
- /*
- * Send packets till queue is empty
- */
- while (true) {
- /*
- * Get the mbuf chain to transmit
- */
- if_atsam_tx_bd_cleanup(sc);
- IF_DEQUEUE(&ifp->if_snd, m);
- if (!m) {
- ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
- break;
- }
- success = if_atsam_send_packet(sc, m);
- if (!success){
- break;
- }
+ n = ether_vlanencap(m, m->m_pkthdr.ether_vtag);
+ if (n == NULL) {
+ m_freem(m);
+ return (ENOBUFS);
}
+
+ m = n;
}
-}
+ sc = ifp->if_softc;
+ IF_ATSAM_LOCK(sc);
-/*
- * Send packet (caller provides header).
- */
-static void if_atsam_enet_start(struct ifnet *ifp)
-{
- if_atsam_softc *sc = (if_atsam_softc *)ifp->if_softc;
+ error = if_atsam_tx_enqueue(sc, ifp, m);
+ if_atsam_tx_reclaim(sc, ifp);
- ifp->if_drv_flags |= IFF_DRV_OACTIVE;
- if_atsam_event_send(sc->tx_daemon_tid,
- ATSAMV7_ETH_START_TRANSMIT_EVENT);
-}
+ if (__predict_false(error != 0)) {
+ struct mbuf *n;
+ n = m_defrag(m, M_NOWAIT);
+ if (n != NULL) {
+ m = n;
+ }
+
+ error = if_atsam_tx_enqueue(sc, ifp, m);
+ if (error != 0) {
+ m_freem(m);
+ if_inc_counter(ifp, IFCOUNTER_OQDROPS, 1);
+ }
+ }
+
+ IF_ATSAM_UNLOCK(sc);
+ return (error);
+}
static uint8_t if_atsam_get_gmac_linkspeed_from_media(uint32_t media_subtype)
{
@@ -975,23 +853,55 @@ if_atsam_tick(void *context)
callout_reset(&sc->tick_ch, hz, if_atsam_tick, sc);
}
+static void
+if_atsam_setup_tx(struct if_atsam_softc *sc)
+{
+ sGmacTxDescriptor *base;
+ struct if_atsam_tx_bds *tx;
+ size_t i;
+ Gmac *pHw;
-/*
- * Sets up the hardware and chooses the interface to be used
- */
-static void if_atsam_init(void *arg)
+ pHw = sc->Gmac_inst.gGmacd.pHw;
+ GMAC_TransmitEnable(pHw, 0);
+
+ /* Allocate memory space for priority queue descriptor list */
+ base = rtems_cache_coherent_allocate(sizeof(base),
+ GMAC_DESCRIPTOR_ALIGNMENT, 0);
+ assert(base != NULL);
+
+ base->addr = 0;
+ base->status.val = GMAC_TX_USED_BIT | GMAC_TX_WRAP_BIT;
+
+ GMAC_SetTxQueue(pHw, (uint32_t)base, 1);
+ GMAC_SetTxQueue(pHw, (uint32_t)base, 2);
+
+ /* Allocate memory space for buffer descriptor list */
+ tx = rtems_cache_coherent_allocate(sizeof(*sc->tx),
+ GMAC_DESCRIPTOR_ALIGNMENT, 0);
+ assert(tx != NULL);
+
+ /* Set variables in context */
+ sc->tx = tx;
+
+ /* Create descriptor list and mark as empty */
+ for (i = 0; i < TX_DESC_COUNT; ++i) {
+ tx->bds[i].addr = 0;
+ tx->bds[i].status.val = GMAC_TX_USED_BIT | TX_DESC_WRAP(i);
+ }
+
+ /* Write Buffer Queue Base Address Register */
+ GMAC_SetTxQueue(pHw, (uint32_t)&tx->bds[0], 0);
+
+ /* Enable Transmission of data */
+ GMAC_TransmitEnable(pHw, 1);
+}
+
+static void
+if_atsam_init(if_atsam_softc *sc)
{
rtems_status_code status;
-
- if_atsam_softc *sc = (if_atsam_softc *)arg;
- struct ifnet *ifp = sc->ifp;
uint32_t dmac_cfg = 0;
- uint32_t gmii_val = 0;
- if (ifp->if_flags & IFF_DRV_RUNNING) {
- return;
- }
- ifp->if_flags |= IFF_DRV_RUNNING;
sc->interrupt_number = GMAC_IRQn;
/* Enable Peripheral Clock */
@@ -1000,7 +910,6 @@ static void if_atsam_init(void *arg)
}
/* Setup interrupts */
NVIC_ClearPendingIRQ(GMAC_IRQn);
- NVIC_EnableIRQ(GMAC_IRQn);
/* Configuration of DMAC */
dmac_cfg = (GMAC_DCFGR_DRBS(GMAC_RX_BUFFER_SIZE >> 6)) |
@@ -1011,20 +920,17 @@ static void if_atsam_init(void *arg)
/* Enable hardware checksum offload for receive */
sc->Gmac_inst.gGmacd.pHw->GMAC_NCFGR |= GMAC_NCFGR_RXCOEN;
+ /* Use Multicast Hash Filter */
+ sc->Gmac_inst.gGmacd.pHw->GMAC_NCFGR |= GMAC_NCFGR_MTIHEN;
+ sc->Gmac_inst.gGmacd.pHw->GMAC_HRB = 0;
+ sc->Gmac_inst.gGmacd.pHw->GMAC_HRT = 0;
+
/* Shut down Transmit and Receive */
GMAC_ReceiveEnable(sc->Gmac_inst.gGmacd.pHw, 0);
GMAC_TransmitEnable(sc->Gmac_inst.gGmacd.pHw, 0);
GMAC_StatisticsWriteEnable(sc->Gmac_inst.gGmacd.pHw, 1);
- /*
- * Allocate mbuf pointers
- */
- sc->rx_mbuf = malloc(sc->amount_rx_buf * sizeof *sc->rx_mbuf,
- M_TEMP, M_NOWAIT);
- sc->tx_mbuf = malloc(sc->amount_tx_buf * sizeof *sc->tx_mbuf,
- M_TEMP, M_NOWAIT);
-
/* Install interrupt handler */
status = rtems_interrupt_handler_install(sc->interrupt_number,
"Ethernet",
@@ -1036,30 +942,143 @@ static void if_atsam_init(void *arg)
/*
* Start driver tasks
*/
- sc->rx_daemon_tid = rtems_bsdnet_newproc("SCrx", 4096,
- if_atsam_rx_daemon, sc);
- sc->tx_daemon_tid = rtems_bsdnet_newproc("SCtx", 4096,
- if_atsam_tx_daemon, sc);
+
+ status = rtems_task_create(rtems_build_name('S', 'C', 'r', 'x'),
+ rtems_bsd_get_task_priority(device_get_name(sc->dev)), 4096,
+ RTEMS_DEFAULT_MODES, RTEMS_DEFAULT_MODES, &sc->rx_daemon_tid);
+ assert(status == RTEMS_SUCCESSFUL);
+
+ status = rtems_task_start(sc->rx_daemon_tid, if_atsam_rx_daemon,
+ (rtems_task_argument)sc);
+ assert(status == RTEMS_SUCCESSFUL);
callout_reset(&sc->tick_ch, hz, if_atsam_tick, sc);
+ if_atsam_setup_tx(sc);
+}
+
+static int
+if_atsam_get_hash_index(const uint8_t *eaddr)
+{
+ uint64_t eaddr64;
+ int index;
+ int i;
+
+ eaddr64 = eaddr[5];
+
+ for (i = 4; i >= 0; --i) {
+ eaddr64 <<= 8;
+ eaddr64 |= eaddr[i];
+ }
+
+ index = 0;
+
+ for (i = 0; i < 6; ++i) {
+ uint64_t bits;
+ int j;
+ int hash;
+
+ bits = eaddr64 >> i;
+ hash = bits & 1;
+
+ for (j = 1; j < 8; ++j) {
+ bits >>= 6;
+ hash ^= bits & 1;
+ }
+
+ index |= hash << i;
+ }
+
+ return index;
+}
+
+static void
+if_atsam_setup_rxfilter(struct if_atsam_softc *sc)
+{
+ struct ifnet *ifp;
+ struct ifmultiaddr *ifma;
+ uint64_t mhash;
+ Gmac *pHw;
+
+ pHw = sc->Gmac_inst.gGmacd.pHw;
+
+ if ((sc->ifp->if_flags & IFF_PROMISC) != 0) {
+ pHw->GMAC_NCFGR |= GMAC_NCFGR_CAF;
+ } else {
+ pHw->GMAC_NCFGR &= ~GMAC_NCFGR_CAF;
+ }
+
+ ifp = sc->ifp;
+
+ if ((ifp->if_flags & IFF_ALLMULTI))
+ mhash = 0xffffffffffffffffLLU;
+ else {
+ mhash = 0;
+ if_maddr_rlock(ifp);
+ CK_STAILQ_FOREACH(ifma, &sc->ifp->if_multiaddrs, ifma_link) {
+ if (ifma->ifma_addr->sa_family != AF_LINK)
+ continue;
+ mhash |= 1LLU << if_atsam_get_hash_index(
+ LLADDR((struct sockaddr_dl *) ifma->ifma_addr));
+ }
+ if_maddr_runlock(ifp);
+ }
+
+ pHw->GMAC_HRB = (uint32_t)mhash;
+ pHw->GMAC_HRT = (uint32_t)(mhash >> 32);
+}
+
+static void
+if_atsam_start_locked(struct if_atsam_softc *sc)
+{
+ struct ifnet *ifp = sc->ifp;
+ Gmac *pHw = sc->Gmac_inst.gGmacd.pHw;
+
+ if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
+ return;
+ }
+
ifp->if_drv_flags |= IFF_DRV_RUNNING;
+
+ if_atsam_setup_rxfilter(sc);
+
+ /* Enable TX/RX */
+ pHw->GMAC_NCR |= GMAC_NCR_RXEN | GMAC_NCR_TXEN;
}
+static void
+if_atsam_start(void *arg)
+{
+ struct if_atsam_softc *sc = arg;
-/*
- * Stop the device
- */
-static void if_atsam_stop(struct if_atsam_softc *sc)
+ IF_ATSAM_LOCK(sc);
+ if_atsam_start_locked(sc);
+ IF_ATSAM_UNLOCK(sc);
+}
+
+static void
+if_atsam_stop_locked(struct if_atsam_softc *sc)
{
struct ifnet *ifp = sc->ifp;
Gmac *pHw = sc->Gmac_inst.gGmacd.pHw;
+ size_t i;
- ifp->if_flags &= ~IFF_DRV_RUNNING;
+ ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
- /* Disable MDIO interface and TX/RX */
+ /* Disable TX/RX */
pHw->GMAC_NCR &= ~(GMAC_NCR_RXEN | GMAC_NCR_TXEN);
- pHw->GMAC_NCR &= ~GMAC_NCR_MPE;
+
+ /* Reinitialize the TX descriptors */
+
+ sc->tx_idx_head = 0;
+ sc->tx_idx_tail = 0;
+
+ for (i = 0; i < TX_DESC_COUNT; ++i) {
+ sc->tx->bds[i].addr = 0;
+ sc->tx->bds[i].status.val = GMAC_TX_USED_BIT | TX_DESC_WRAP(i);
+ m_freem(sc->tx_mbufs[i]);
+ sc->tx_mbufs[i] = NULL;
+ }
}
@@ -1070,7 +1089,7 @@ if_atsam_poll_hw_stats(struct if_atsam_softc *sc)
Gmac *pHw = sc->Gmac_inst.gGmacd.pHw;
octets = pHw->GMAC_OTLO;
- octets |= pHw->GMAC_OTHI << 32;
+ octets |= (uint64_t)pHw->GMAC_OTHI << 32;
sc->stats.octets_transm += octets;
sc->stats.frames_transm += pHw->GMAC_FT;
sc->stats.broadcast_frames_transm += pHw->GMAC_BCFT;
@@ -1092,7 +1111,7 @@ if_atsam_poll_hw_stats(struct if_atsam_softc *sc)
sc->stats.carrier_sense_errors += pHw->GMAC_CSE;
octets = pHw->GMAC_ORLO;
- octets |= pHw->GMAC_ORHI << 32;
+ octets |= (uint64_t)pHw->GMAC_ORHI << 32;
sc->stats.octets_rec += octets;
sc->stats.frames_rec += pHw->GMAC_FR;
sc->stats.broadcast_frames_rec += pHw->GMAC_BCFR;
@@ -1120,24 +1139,159 @@ if_atsam_poll_hw_stats(struct if_atsam_softc *sc)
sc->stats.udp_checksum_errors += pHw->GMAC_UCE;
}
+static int
+if_atsam_stats_reset(SYSCTL_HANDLER_ARGS)
+{
+ struct if_atsam_softc *sc = arg1;
+ int value;
+ int error;
+
+ value = 0;
+ error = sysctl_handle_int(oidp, &value, 0, req);
+ if (error != 0 || req->newptr == NULL) {
+ return (error);
+ }
+
+ if (value != 0) {
+ IF_ATSAM_LOCK(sc);
+ if_atsam_poll_hw_stats(sc);
+ memset(&sc->stats, 0, sizeof(sc->stats));
+ IF_ATSAM_UNLOCK(sc);
+ }
+
+ return (0);
+}
+
+static int
+if_atsam_sysctl_reg(SYSCTL_HANDLER_ARGS)
+{
+ u_int value;
+
+ value = *(uint32_t *)arg1;
+ return (sysctl_handle_int(oidp, &value, 0, req));
+}
+
+static int
+if_atsam_sysctl_tx_desc(SYSCTL_HANDLER_ARGS)
+{
+ struct if_atsam_softc *sc = arg1;
+ Gmac *pHw = sc->Gmac_inst.gGmacd.pHw;
+ struct sbuf *sb;
+ int error;
+ size_t i;
+
+ error = sysctl_wire_old_buffer(req, 0);
+ if (error != 0) {
+ return (error);
+ }
+
+ sb = sbuf_new_for_sysctl(NULL, NULL, 1024, req);
+ if (sb == NULL) {
+ return (ENOMEM);
+ }
+
+ sbuf_printf(sb, "\n\tHead %u\n", sc->tx_idx_head);
+ sbuf_printf(sb, "\tTail %u\n", sc->tx_idx_tail);
+ sbuf_printf(sb, "\tDMA %u\n",
+ (pHw->GMAC_TBQB - (uintptr_t)&sc->tx->bds[0]) / 8);
+
+ for (i = 0; i < TX_DESC_COUNT; ++i) {
+ sbuf_printf(sb, "\t[%2u] %08x %08x\n", i,
+ sc->tx->bds[i].status.val, sc->tx->bds[i].addr);
+ }
+
+ error = sbuf_finish(sb);
+ sbuf_delete(sb);
+ return (error);
+}
+
+static int
+if_atsam_sysctl_rx_desc(SYSCTL_HANDLER_ARGS)
+{
+ struct if_atsam_softc *sc = arg1;
+ Gmac *pHw = sc->Gmac_inst.gGmacd.pHw;
+ struct sbuf *sb;
+ int error;
+ size_t i;
+
+ error = sysctl_wire_old_buffer(req, 0);
+ if (error != 0) {
+ return (error);
+ }
+
+ sb = sbuf_new_for_sysctl(NULL, NULL, 1024, req);
+ if (sb == NULL) {
+ return (ENOMEM);
+ }
+
+ sbuf_printf(sb, "\n\tHead %u\n", sc->rx_idx_head);
+ sbuf_printf(sb, "\tDMA %u\n",
+ (pHw->GMAC_RBQB - (uintptr_t)&sc->rx->bds[0]) / 8);
+
+ for (i = 0; i < RX_DESC_COUNT; ++i) {
+ sbuf_printf(sb, "\t[%2u] %08x %08x\n", i,
+ sc->rx->bds[i].status.val, sc->rx->bds[i].addr);
+ }
+
+ error = sbuf_finish(sb);
+ sbuf_delete(sb);
+ return (error);
+}
static void
if_atsam_add_sysctls(device_t dev)
{
struct if_atsam_softc *sc = device_get_softc(dev);
+ Gmac *pHw = sc->Gmac_inst.gGmacd.pHw;
struct sysctl_ctx_list *ctx;
+ struct sysctl_oid_list *base;
struct sysctl_oid_list *statsnode;
struct sysctl_oid_list *hwstatsnode;
struct sysctl_oid_list *child;
struct sysctl_oid *tree;
ctx = device_get_sysctl_ctx(dev);
- child = SYSCTL_CHILDREN(device_get_sysctl_tree(dev));
+ base = SYSCTL_CHILDREN(device_get_sysctl_tree(dev));
- tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD,
+ tree = SYSCTL_ADD_NODE(ctx, base, OID_AUTO, "regs", CTLFLAG_RD,
+ NULL, "if_atsam registers");
+ child = SYSCTL_CHILDREN(tree);
+
+ SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "txdesc", CTLTYPE_STRING |
+ CTLFLAG_RD, sc, 0, if_atsam_sysctl_tx_desc, "A",
+ "Transmit Descriptors");
+ SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "rxdesc", CTLTYPE_STRING |
+ CTLFLAG_RD, sc, 0, if_atsam_sysctl_rx_desc, "A",
+ "Receive Descriptors");
+ SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "imr", CTLTYPE_UINT |
+ CTLFLAG_RD, __DEVOLATILE(uint32_t *, &pHw->GMAC_IMR), 0,
+ if_atsam_sysctl_reg, "I", "IMR");
+ SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "isr", CTLTYPE_UINT |
+ CTLFLAG_RD, __DEVOLATILE(uint32_t *, &pHw->GMAC_ISR), 0,
+ if_atsam_sysctl_reg, "I", "ISR");
+ SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "rsr", CTLTYPE_UINT |
+ CTLFLAG_RD, __DEVOLATILE(uint32_t *, &pHw->GMAC_RSR), 0,
+ if_atsam_sysctl_reg, "I", "RSR");
+ SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "tsr", CTLTYPE_UINT |
+ CTLFLAG_RD, __DEVOLATILE(uint32_t *, &pHw->GMAC_TSR), 0,
+ if_atsam_sysctl_reg, "I", "TSR");
+ SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "nsr", CTLTYPE_UINT |
+ CTLFLAG_RD, __DEVOLATILE(uint32_t *, &pHw->GMAC_NSR), 0,
+ if_atsam_sysctl_reg, "I", "NSR");
+ SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "ncfgr", CTLTYPE_UINT |
+ CTLFLAG_RD, __DEVOLATILE(uint32_t *, &pHw->GMAC_NCFGR), 0,
+ if_atsam_sysctl_reg, "I", "NCFGR");
+ SYSCTL_ADD_PROC(ctx, child, OID_AUTO, "ncr", CTLTYPE_UINT |
+ CTLFLAG_RD, __DEVOLATILE(uint32_t *, &pHw->GMAC_NCR), 0,
+ if_atsam_sysctl_reg, "I", "NCR");
+
+ tree = SYSCTL_ADD_NODE(ctx, base, OID_AUTO, "stats", CTLFLAG_RD,
NULL, "if_atsam statistics");
statsnode = SYSCTL_CHILDREN(tree);
+ SYSCTL_ADD_PROC(ctx, statsnode, OID_AUTO, "reset", CTLTYPE_INT |
+ CTLFLAG_WR, sc, 0, if_atsam_stats_reset, "I", "Reset");
+
tree = SYSCTL_ADD_NODE(ctx, statsnode, OID_AUTO, "sw", CTLFLAG_RD,
NULL, "if_atsam software statistics");
child = SYSCTL_CHILDREN(tree);
@@ -1145,12 +1299,12 @@ if_atsam_add_sysctls(device_t dev)
SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "rx_overrun_errors",
CTLFLAG_RD, &sc->stats.rx_overrun_errors, 0,
"RX overrun errors");
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "rx_used_bit_reads",
+ CTLFLAG_RD, &sc->stats.rx_used_bit_reads, 0,
+ "RX used bit reads");
SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "rx_interrupts",
CTLFLAG_RD, &sc->stats.rx_interrupts, 0,
"Rx interrupts");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "tx_complete_int",
- CTLFLAG_RD, &sc->stats.tx_complete_int, 0,
- "Tx complete interrupts");
SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "tx_tur_errors",
CTLFLAG_RD, &sc->stats.tx_tur_errors, 0,
"Error Tur Tx interrupts");
@@ -1163,9 +1317,6 @@ if_atsam_add_sysctls(device_t dev)
SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "tx_hresp_errors",
CTLFLAG_RD, &sc->stats.tx_hresp_errors, 0,
"Error Hresp Tx interrupts");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "tx_interrupts",
- CTLFLAG_RD, &sc->stats.tx_interrupts, 0,
- "Tx interrupts");
tree = SYSCTL_ADD_NODE(ctx, statsnode, OID_AUTO, "hw", CTLFLAG_RD,
NULL, "if_atsam hardware statistics");
@@ -1175,40 +1326,40 @@ if_atsam_add_sysctls(device_t dev)
NULL, "if_atsam hardware transmit statistics");
child = SYSCTL_CHILDREN(tree);
- SYSCTL_ADD_UQUAD(ctx, child, OID_AUTO, "octets_transm",
+ SYSCTL_ADD_UQUAD(ctx, child, OID_AUTO, "octets",
CTLFLAG_RD, &sc->stats.octets_transm,
"Octets Transmitted");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_transm",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames",
CTLFLAG_RD, &sc->stats.frames_transm, 0,
"Frames Transmitted");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "broadcast_frames_transm",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "broadcast_frames",
CTLFLAG_RD, &sc->stats.broadcast_frames_transm, 0,
"Broadcast Frames Transmitted");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "multicast_frames_transm",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "multicast_frames",
CTLFLAG_RD, &sc->stats.multicast_frames_transm, 0,
"Multicast Frames Transmitted");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "pause_frames_transm",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "pause_frames",
CTLFLAG_RD, &sc->stats.pause_frames_transm, 0,
"Pause Frames Transmitted");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_64_byte_transm",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_64_bytes",
CTLFLAG_RD, &sc->stats.frames_64_byte_transm, 0,
"64 Byte Frames Transmitted");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_65_to_127_byte_transm",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_65_to_127_bytes",
CTLFLAG_RD, &sc->stats.frames_65_to_127_byte_transm, 0,
"65 to 127 Byte Frames Transmitted");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_128_to_255_byte_transm",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_128_to_255_bytes",
CTLFLAG_RD, &sc->stats.frames_128_to_255_byte_transm, 0,
"128 to 255 Byte Frames Transmitted");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_256_to_511_byte_transm",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_256_to_511_bytes",
CTLFLAG_RD, &sc->stats.frames_256_to_511_byte_transm, 0,
"256 to 511 Byte Frames Transmitted");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_512_to_1023_byte_transm",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_512_to_1023_bytes",
CTLFLAG_RD, &sc->stats.frames_512_to_1023_byte_transm, 0,
"512 to 1023 Byte Frames Transmitted");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_1024_to_1518_byte_transm",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_1024_to_1518_bytes",
CTLFLAG_RD, &sc->stats.frames_1024_to_1518_byte_transm, 0,
"1024 to 1518 Byte Frames Transmitted");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_greater_1518_byte_transm",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_1519_to_maximum_bytes",
CTLFLAG_RD, &sc->stats.frames_greater_1518_byte_transm, 0,
"Greater Than 1518 Byte Frames Transmitted");
SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "transmit_underruns",
@@ -1237,49 +1388,49 @@ if_atsam_add_sysctls(device_t dev)
NULL, "if_atsam hardware receive statistics");
child = SYSCTL_CHILDREN(tree);
- SYSCTL_ADD_UQUAD(ctx, child, OID_AUTO, "octets_rec",
+ SYSCTL_ADD_UQUAD(ctx, child, OID_AUTO, "octets",
CTLFLAG_RD, &sc->stats.octets_rec,
"Octets Received");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_rec",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames",
CTLFLAG_RD, &sc->stats.frames_rec, 0,
"Frames Received");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "broadcast_frames_rec",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "broadcast_frames",
CTLFLAG_RD, &sc->stats.broadcast_frames_rec, 0,
"Broadcast Frames Received");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "multicast_frames_rec",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "multicast_frames",
CTLFLAG_RD, &sc->stats.multicast_frames_rec, 0,
"Multicast Frames Received");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "pause_frames_rec",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "pause_frames",
CTLFLAG_RD, &sc->stats.pause_frames_rec, 0,
"Pause Frames Received");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_64_byte_rec",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_64_bytes",
CTLFLAG_RD, &sc->stats.frames_64_byte_rec, 0,
"64 Byte Frames Received");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_65_to_127_byte_rec",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_65_to_127_bytes",
CTLFLAG_RD, &sc->stats.frames_65_to_127_byte_rec, 0,
"65 to 127 Byte Frames Received");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_128_to_255_byte_rec",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_128_to_255_bytes",
CTLFLAG_RD, &sc->stats.frames_128_to_255_byte_rec, 0,
"128 to 255 Byte Frames Received");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_256_to_511_byte_rec",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_256_to_511_bytes",
CTLFLAG_RD, &sc->stats.frames_256_to_511_byte_rec, 0,
"256 to 511 Byte Frames Received");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_512_to_1023_byte_rec",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_512_to_1023_bytes",
CTLFLAG_RD, &sc->stats.frames_512_to_1023_byte_rec, 0,
"512 to 1023 Byte Frames Received");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_1024_to_1518_byte_rec",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_1024_to_1518_bytes",
CTLFLAG_RD, &sc->stats.frames_1024_to_1518_byte_rec, 0,
"1024 to 1518 Byte Frames Received");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_1519_to_maximum_byte_rec",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frames_1519_to_maximum_bytes",
CTLFLAG_RD, &sc->stats.frames_1519_to_maximum_byte_rec, 0,
"1519 to Maximum Byte Frames Received");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "undersize_frames_rec",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "undersize_frames",
CTLFLAG_RD, &sc->stats.undersize_frames_rec, 0,
"Undersize Frames Received");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "oversize_frames_rec",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "oversize_frames",
CTLFLAG_RD, &sc->stats.oversize_frames_rec, 0,
"Oversize Frames Received");
- SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "jabbers_rec",
+ SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "jabbers",
CTLFLAG_RD, &sc->stats.jabbers_rec, 0,
"Jabbers Received");
SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "frame_check_sequence_errors",
@@ -1311,49 +1462,6 @@ if_atsam_add_sysctls(device_t dev)
"UDP Checksum Errors");
}
-
-/*
- * Calculates the index that is to be sent into the hash registers
- */
-static void if_atsam_get_hash_index(uint64_t addr, uint32_t *val)
-{
- uint64_t tmp_val;
- uint8_t i, j;
- uint64_t idx;
- int offset = 0;
-
- addr &= MAC_ADDR_MASK;
-
- for (i = 0; i < HASH_INDEX_AMOUNT; ++i) {
- tmp_val = 0;
- offset = 0;
- for (j = 0; j < HASH_ELEMENTS_PER_INDEX; j++) {
- idx = (addr >> (offset + i)) & MAC_IDX_MASK;
- tmp_val ^= idx;
- offset += HASH_INDEX_AMOUNT;
- }
- if (tmp_val > 0) {
- *val |= (1u << i);
- }
- }
-}
-
-
-/*
- * Dis/Enable promiscuous Mode
- */
-static void if_atsam_promiscuous_mode(if_atsam_softc *sc, bool enable)
-{
- Gmac *pHw = sc->Gmac_inst.gGmacd.pHw;
-
- if (enable) {
- pHw->GMAC_NCFGR |= GMAC_PROM_ENABLE;
- } else {
- pHw->GMAC_NCFGR &= ~GMAC_PROM_ENABLE;
- }
-}
-
-
static int
if_atsam_mediaioctl(if_atsam_softc *sc, struct ifreq *ifr, u_long command)
{
@@ -1380,8 +1488,6 @@ if_atsam_ioctl(struct ifnet *ifp, ioctl_command_t command, caddr_t data)
if_atsam_softc *sc = (if_atsam_softc *)ifp->if_softc;
struct ifreq *ifr = (struct ifreq *)data;
int rv = 0;
- bool prom_enable;
- struct mii_data *mii;
switch (command) {
case SIOCGIFMEDIA:
@@ -1389,17 +1495,31 @@ if_atsam_ioctl(struct ifnet *ifp, ioctl_command_t command, caddr_t data)
rv = if_atsam_mediaioctl(sc, ifr, command);
break;
case SIOCSIFFLAGS:
+ IF_ATSAM_LOCK(sc);
if (ifp->if_flags & IFF_UP) {
- if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
- if_atsam_init(sc);
+ if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
+ if ((ifp->if_flags ^ sc->if_flags) &
+ (IFF_PROMISC | IFF_ALLMULTI)) {
+ if_atsam_setup_rxfilter(sc);
+ }
+ } else {
+ if_atsam_start_locked(sc);
}
- prom_enable = ((ifp->if_flags & IFF_PROMISC) != 0);
- if_atsam_promiscuous_mode(sc, prom_enable);
} else {
if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
- if_atsam_stop(sc);
+ if_atsam_stop_locked(sc);
}
}
+ sc->if_flags = ifp->if_flags;
+ IF_ATSAM_UNLOCK(sc);
+ break;
+ case SIOCADDMULTI:
+ case SIOCDELMULTI:
+ if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
+ IF_ATSAM_LOCK(sc);
+ if_atsam_setup_rxfilter(sc);
+ IF_ATSAM_UNLOCK(sc);
+ }
break;
default:
rv = ether_ioctl(ifp, command, data);
@@ -1416,7 +1536,6 @@ static int if_atsam_driver_attach(device_t dev)
if_atsam_softc *sc;
struct ifnet *ifp;
int unit;
- char *unitName;
uint8_t eaddr[ETHER_ADDR_LEN];
sc = device_get_softc(dev);
@@ -1437,13 +1556,6 @@ static int if_atsam_driver_attach(device_t dev)
memcpy(sc->GMacAddress, eaddr, ETHER_ADDR_LEN);
- sc->amount_rx_buf = RXBUF_COUNT;
- sc->amount_tx_buf = TXBUF_COUNT;
-
- sc->tx_ring.tx_bd_used = 0;
- sc->tx_ring.tx_bd_free = 0;
- sc->tx_ring.length = sc->amount_tx_buf;
-
/* Set Initial Link Speed */
sc->link_speed = GMAC_SPEED_100M;
sc->link_duplex = GMAC_DUPLEX_FULL;
@@ -1486,17 +1598,20 @@ static int if_atsam_driver_attach(device_t dev)
*/
ifp->if_softc = sc;
if_initname(ifp, device_get_name(dev), device_get_unit(dev));
- ifp->if_init = if_atsam_init;
+ ifp->if_init = if_atsam_start;
ifp->if_ioctl = if_atsam_ioctl;
- ifp->if_start = if_atsam_enet_start;
- ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX;
+ ifp->if_transmit = if_atsam_transmit;
+ ifp->if_qflush = if_qflush;
+ ifp->if_flags = IFF_BROADCAST | IFF_MULTICAST | IFF_SIMPLEX;
ifp->if_capabilities |= IFCAP_HWCSUM | IFCAP_HWCSUM_IPV6 |
- IFCAP_VLAN_HWCSUM;
+ IFCAP_VLAN_HWCSUM | IFCAP_VLAN_HWTAGGING;
+ ifp->if_capenable = ifp->if_capabilities;
ifp->if_hwassist = CSUM_IP | CSUM_IP_UDP | CSUM_IP_TCP |
CSUM_IP6_UDP | CSUM_IP6_TCP;
- IFQ_SET_MAXLEN(&ifp->if_snd, TXBUF_COUNT - 1);
- ifp->if_snd.ifq_drv_maxlen = TXBUF_COUNT - 1;
+ IFQ_SET_MAXLEN(&ifp->if_snd, TX_DESC_COUNT - 1);
+ ifp->if_snd.ifq_drv_maxlen = TX_DESC_COUNT - 1;
IFQ_SET_READY(&ifp->if_snd);
+ ifp->if_hdrlen = sizeof(struct ether_vlan_header);
/*
* Attach the interface
@@ -1504,6 +1619,7 @@ static int if_atsam_driver_attach(device_t dev)
ether_ifattach(ifp, eaddr);
if_atsam_add_sysctls(dev);
+ if_atsam_init(sc);
return (0);
}
diff --git a/rtemsbsd/sys/dev/nvd/nvd.c b/rtemsbsd/sys/dev/nvd/nvd.c
index 897b0af6..4a8e8ac1 100644
--- a/rtemsbsd/sys/dev/nvd/nvd.c
+++ b/rtemsbsd/sys/dev/nvd/nvd.c
@@ -43,6 +43,7 @@
#include <stdatomic.h>
#include <rtems/blkdev.h>
+#include <rtems/thread.h>
#define NVD_STR "nvd"
@@ -164,10 +165,9 @@ nvd_completion(void *arg, const struct nvme_completion *status)
static int
nvd_request(struct nvd_disk *ndisk, rtems_blkdev_request *req,
- uint32_t media_blocks_per_block)
+ uint32_t media_block_size)
{
uint32_t i;
- uint32_t lb_count;
uint32_t bufnum;
BSD_ASSERT(req->req == RTEMS_BLKDEV_REQ_READ ||
@@ -178,13 +178,15 @@ nvd_request(struct nvd_disk *ndisk, rtems_blkdev_request *req,
req->status = RTEMS_SUCCESSFUL;
bufnum = req->bufnum;
req->bufnum |= bufnum << NVD_BUFNUM_SHIFT;
- lb_count = media_blocks_per_block * ndisk->lb_per_media_block;
for (i = 0; i < bufnum; ++i) {
rtems_blkdev_sg_buffer *sg;
+ uint32_t lb_count;
int error;
sg = &req->bufs[i];
+ lb_count = (sg->length / media_block_size) *
+ ndisk->lb_per_media_block;
if (req->req == RTEMS_BLKDEV_REQ_READ) {
error = nvme_ns_cmd_read(ndisk->ns, sg->buffer,
@@ -208,28 +210,27 @@ nvd_request(struct nvd_disk *ndisk, rtems_blkdev_request *req,
static void
nvd_sync_completion(void *arg, const struct nvme_completion *status)
{
- rtems_status_code sc;
-
- if (nvme_completion_is_error(status)) {
- sc = RTEMS_IO_ERROR;
- } else {
- sc = RTEMS_SUCCESSFUL;
- }
+ rtems_binary_semaphore *sync;
- rtems_blkdev_request_done(arg, sc);
+ sync = arg;
+ rtems_binary_semaphore_post(sync);
}
static int
-nvd_sync(struct nvd_disk *ndisk, rtems_blkdev_request *req)
+nvd_sync(struct nvd_disk *ndisk)
{
+ rtems_binary_semaphore sync;
int error;
- error = nvme_ns_cmd_flush(ndisk->ns, nvd_sync_completion, req);
- if (error != 0) {
- rtems_blkdev_request_done(req, RTEMS_NO_MEMORY);
+ rtems_binary_semaphore_init(&sync, "nvd sync");
+
+ error = nvme_ns_cmd_flush(ndisk->ns, nvd_sync_completion, &sync);
+ if (error == 0) {
+ rtems_binary_semaphore_wait(&sync);
}
- return (0);
+ rtems_binary_semaphore_destroy(&sync);
+ return (error);
}
static int
@@ -240,11 +241,11 @@ nvd_ioctl(rtems_disk_device *dd, uint32_t req, void *arg)
ndisk = rtems_disk_get_driver_data(dd);
if (req == RTEMS_BLKIO_REQUEST) {
- return (nvd_request(ndisk, arg, dd->media_blocks_per_block));
+ return (nvd_request(ndisk, arg, dd->media_block_size));
}
if (req == RTEMS_BLKDEV_REQ_SYNC) {
- return (nvd_sync(ndisk, arg));
+ return (nvd_sync(ndisk));
}
if (req == RTEMS_BLKIO_CAPABILITIES) {
diff --git a/rtemsbsd/sys/net/if_ppp.c b/rtemsbsd/sys/net/if_ppp.c
index 709f13e0..e134dc76 100644
--- a/rtemsbsd/sys/net/if_ppp.c
+++ b/rtemsbsd/sys/net/if_ppp.c
@@ -313,11 +313,12 @@ static rtems_task ppp_txdaemon(rtems_task_argument arg)
frag=0;
/* initialize output values */
- sc->sc_outfcs = PPP_INITFCS;
- sc->sc_outbuf = (u_char *)0;
- sc->sc_outlen = (short )0;
- sc->sc_outoff = (short )0;
- sc->sc_outfcslen = (short )0;
+ sc->sc_outfcs = PPP_INITFCS;
+ sc->sc_outbuf = (u_char *)0;
+ sc->sc_outlen = (short )0;
+ sc->sc_outoff = (short )0;
+ sc->sc_outoff_update = false;
+ sc->sc_outfcslen = (short )0;
/* printf("Start Transmit Packet..\n"); */
diff --git a/rtemsbsd/sys/net/if_pppvar.h b/rtemsbsd/sys/net/if_pppvar.h
index fdfb56df..bd11bcbc 100644
--- a/rtemsbsd/sys/net/if_pppvar.h
+++ b/rtemsbsd/sys/net/if_pppvar.h
@@ -117,6 +117,7 @@ struct ppp_softc {
struct ifqueue sc_freeq; /* free packets */
short sc_outoff; /* output packet byte offset */
+ bool sc_outoff_update; /* outoff needs update in pppstart */
short sc_outflag; /* output status flag */
short sc_outlen; /* length of output packet */
short sc_outfcslen; /* length of output fcs data */
diff --git a/rtemsbsd/sys/net/ppp_tty.c b/rtemsbsd/sys/net/ppp_tty.c
index 80d4fee1..2e850dc7 100644
--- a/rtemsbsd/sys/net/ppp_tty.c
+++ b/rtemsbsd/sys/net/ppp_tty.c
@@ -124,7 +124,7 @@ int pppread(struct rtems_termios_tty *tty, rtems_libio_rw_args_t *rw_args);
int pppwrite(struct rtems_termios_tty *tty, rtems_libio_rw_args_t *rw_args);
int ppptioctl(struct rtems_termios_tty *tty, rtems_libio_ioctl_args_t *args);
int pppinput(int c, struct rtems_termios_tty *tty);
-int pppstart(struct rtems_termios_tty *tp);
+int pppstart(struct rtems_termios_tty *tp, int len);
u_short pppfcs(u_short fcs, u_char *cp, int len);
void pppallocmbuf(struct ppp_softc *sc, struct mbuf **mp);
@@ -557,7 +557,7 @@ pppasyncctlp(
* Called at spltty or higher.
*/
int
-pppstart(struct rtems_termios_tty *tp)
+pppstart(struct rtems_termios_tty *tp, int len)
{
u_char *sendBegin;
u_long ioffset = (u_long )0;
@@ -567,6 +567,13 @@ pppstart(struct rtems_termios_tty *tp)
/* ensure input is valid and we are busy */
if (( sc != NULL ) && ( sc->sc_outflag & SC_TX_BUSY )) {
+ /* Adapt offsets if necessary */
+ if ( sc->sc_outoff_update ) {
+ sc->sc_stats.ppp_obytes += len;
+ sc->sc_outoff += len;
+ sc->sc_outoff_update = false;
+ }
+
/* check to see if we need to get the next buffer */
/* Ready with PPP_FLAG Character ? */
@@ -644,8 +651,25 @@ pppstart(struct rtems_termios_tty *tp)
/* write out the character(s) and update the stats */
(*tp->handler.write)(ctx, (char *)sendBegin, (ioffset > 0) ? ioffset : 1);
- sc->sc_stats.ppp_obytes += (ioffset > 0) ? ioffset : 1;
- sc->sc_outoff += ioffset;
+ /*
+ * In case of polled drivers, everything is sent here. So adapt the
+ * offsets. In case of interrupt or task driven drivers, we don't know
+ * whether all characters have been sent. We only get feedback via
+ * rtems_termios_dequeue_characters() function which is the one that is
+ * calling us.
+ */
+ if (tp->handler.mode == TERMIOS_POLLED) {
+ sc->sc_stats.ppp_obytes += (ioffset > 0) ? ioffset : 1;
+ sc->sc_outoff += ioffset;
+ sc->sc_outoff_update = false;
+ } else {
+ if (ioffset > 0) {
+ sc->sc_outoff_update = true;
+ } else {
+ sc->sc_outoff_update = false;
+ sc->sc_stats.ppp_obytes += 1;
+ }
+ }
return (0);
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-21 22:07:11 +0000