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authorChristian Mauderer <christian.mauderer@embedded-brains.de>2020-04-02 13:44:46 +0200
committerChristian Mauderer <christian.mauderer@embedded-brains.de>2020-04-15 16:32:34 +0200
commitc54699f40f0fd54aa8fda8e04b079c332042d91f (patch)
tree8aa799566e071d02b732c0c8cf89f9007f95dc40
parentregulator: Add to build. (diff)
downloadrtems-libbsd-c54699f40f0fd54aa8fda8e04b079c332042d91f.tar.bz2
Add support for i.mx cache.
Update #3869.
-rwxr-xr-xrtemsbsd/include/machine/rtems-bsd-cache.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/rtemsbsd/include/machine/rtems-bsd-cache.h b/rtemsbsd/include/machine/rtems-bsd-cache.h
index bd496f9d..73b55e25 100755
--- a/rtemsbsd/include/machine/rtems-bsd-cache.h
+++ b/rtemsbsd/include/machine/rtems-bsd-cache.h
@@ -45,7 +45,7 @@
#if defined(LIBBSP_ARM_LPC24XX_BSP_H) || (defined(LIBBSP_ARM_LPC32XX_BSP_H) && defined(LPC32XX_DISABLE_MMU))
/* No cache */
#elif defined(LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H) || \
- defined(LIBBSP_ARM_XILINX_ZYNQ_BSP_H) || (defined(LIBBSP_ARM_LPC32XX_BSP_H) && !defined(LPC32XX_DISABLE_MMU))
+ defined(LIBBSP_ARM_XILINX_ZYNQ_BSP_H) || (defined(LIBBSP_ARM_LPC32XX_BSP_H) && !defined(LPC32XX_DISABLE_MMU)) || defined(LIBBSP_ARM_IMX_BSP_H)
/* With cache, no coherency support in hardware */
#define CPU_DATA_CACHE_ALIGNMENT 32
#elif defined(__GEN83xx_BSP_h)