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| author | Kinsey Moore <kinsey.moore@oarcorp.com> | 2022-09-26 15:59:38 -0500 |
|---|---|---|
| committer | Joel Sherrill <joel@rtems.org> | 2022-10-21 15:10:43 -0500 |
| commit | cf8fa080158f63fb1995437296ea9b2fe5c47509 (patch) | |
| tree | a74be976edf39751184007a8f8e13bf9d50d4ba1 | |
| parent | rtemsbsd/arasan_sdhci: Update description (diff) | |
| download | rtems-libbsd-cf8fa080158f63fb1995437296ea9b2fe5c47509.tar.bz2 | |
rtemsbsd/arasan_sdhci: Remove redundant clock cap
The BSD SD subsystem enforces a 50MHz clock cap for devices which don't
report their own maximum clock speed. This setting is unnecessary for
the Zynq 7000 version of this IP and restricts the Zynq Ultrascale+
MPSoC version of this IP without need since it reports its maximum speed
as 200MHz.
| -rw-r--r-- | rtemsbsd/sys/dev/sdhci/arasan_sdhci.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c b/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c index 43231113..bac6b148 100644 --- a/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c +++ b/rtemsbsd/sys/dev/sdhci/arasan_sdhci.c @@ -284,8 +284,6 @@ arasan_sdhci_attach(device_t dev) */ sc->slot.quirks |= SDHCI_QUIRK_BROKEN_DMA; - sc->slot.max_clk = 50000000; - sdhci_init_slot(dev, &sc->slot, 0); sc->slot_init_done = true; |