blob: 7c8ecdfdb082499f2e227ec9e6b7f5f6b5444555 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
|
.. SPDX-License-Identifier: CC-BY-SA-4.0
.. Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
.. _BSP_aarch64_qemu_xilinx_zynqmp_ilp32:
.. _BSP_aarch64_qemu_xilinx_zynqmp_lp64:
Qemu Xilinx ZynqMP
==================
This BSP supports two variants, `xilinx-zynqmp-ilp32` and `xilinx-zynqmp-lp64`.
The basic hardware initialization is performed by the BSP. These BSPs support
the GICv2 interrupt controller present in all ZynqMP systems.
Boot via ELF
------------
The executable image is booted by Qemu in ELF format.
Clock Driver
------------
The clock driver uses the `ARM Generic Timer`.
Console Driver
--------------
The console driver supports the default Qemu emulated ARM PL011 PrimeCell UART.
Running Executables
-------------------
Executables generated by these BSPs can be run using the following command::
qemu-system-aarch64 -no-reboot -nographic -serial mon:stdio \
-machine xlnx-zcu102 -m 4096 -kernel example.exe
|
