From 265bee75ec9a4fb89d104781bdf4628e8d5ca256 Mon Sep 17 00:00:00 2001
From: Kinsey Moore <kinsey.moore@oarcorp.com>
Date: Mon, 7 Dec 2020 11:01:47 -0600
Subject: user: Add aarch64/xilinx-zynqmp

---
 user/bsps/aarch64/xilinx-zynqmp.rst | 35 +++++++++++++++++++++++++++++++++++
 user/bsps/bsps-aarch64.rst          |  1 +
 2 files changed, 36 insertions(+)
 create mode 100644 user/bsps/aarch64/xilinx-zynqmp.rst

(limited to 'user')

diff --git a/user/bsps/aarch64/xilinx-zynqmp.rst b/user/bsps/aarch64/xilinx-zynqmp.rst
new file mode 100644
index 0000000..fd225b5
--- /dev/null
+++ b/user/bsps/aarch64/xilinx-zynqmp.rst
@@ -0,0 +1,35 @@
+.. SPDX-License-Identifier: CC-BY-SA-4.0
+
+.. Copyright (C) 2020 On-Line Applications Research Corporation (OAR)
+
+.. _BSP_aarch64_qemu_xilinx_zynqmp_ilp32:
+.. _BSP_aarch64_qemu_xilinx_zynqmp_lp64:
+
+Qemu Xilinx ZynqMP
+==================
+
+This BSP supports two variants, `xilinx-zynqmp-ilp32` and `xilinx-zynqmp-lp64`.
+The basic hardware initialization is performed by the BSP. These BSPs support
+the GICv2 interrupt controller present in all ZynqMP systems.
+
+Boot via ELF
+------------
+The executable image is booted by Qemu in ELF format.
+
+Clock Driver
+------------
+
+The clock driver uses the `ARM Generic Timer`.
+
+Console Driver
+--------------
+
+The console driver supports the default Qemu emulated ARM PL011 PrimeCell UART.
+
+Running Executables
+-------------------
+
+Executables generated by these BSPs can be run using the following command::
+
+qemu-system-aarch64 -no-reboot -nographic -serial null -serial mon:stdio \
+ -machine xlnx-zcu102 -m 4096 -kernel example.exe
diff --git a/user/bsps/bsps-aarch64.rst b/user/bsps/bsps-aarch64.rst
index 319310e..0d4b23c 100644
--- a/user/bsps/bsps-aarch64.rst
+++ b/user/bsps/bsps-aarch64.rst
@@ -6,3 +6,4 @@ aarch64 (AArch64)
 *****************
 
 .. include:: aarch64/a53.rst
+.. include:: aarch64/xilinx-zynqmp.rst
-- 
cgit v1.2.3