From 7497f5ed9a2cebe06619987e295cae529dde9fad Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Fri, 28 Oct 2016 15:57:11 -0500 Subject: porting: Review and tidy up multiple formatting issues. --- porting/miscellanous.rst | 36 +++++++++++++++++++++--------------- 1 file changed, 21 insertions(+), 15 deletions(-) (limited to 'porting/miscellanous.rst') diff --git a/porting/miscellanous.rst b/porting/miscellanous.rst index be208a4..863160e 100644 --- a/porting/miscellanous.rst +++ b/porting/miscellanous.rst @@ -10,10 +10,11 @@ The ``_CPU_Fatal_halt`` routine is the default fatal error handler. This routine copies _error into a known place - typically a stack location or a register, optionally disables interrupts, and halts/stops the CPU. It is prototyped as follows and is often implemented as a macro: + .. code-block:: c void _CPU_Fatal_halt( - unsigned32 _error + unsigned32 _error ); CPU Context Validation @@ -23,6 +24,7 @@ The test case ``sptests/spcontext01`` ensures that the context switching and interrupt processing works. This test uses two support functions provided by the CPU port. These two functions are only used for this test and have no other purpose. + .. code-block:: c void _CPU_Context_volatile_clobber( uintptr_t pattern ); @@ -67,11 +69,11 @@ peripheral controllers. Specifying Processor Endianness ------------------------------- -The ``CPU_BIG_ENDIAN`` and ``CPU_LITTLE_ENDIAN`` are -set to specify the endian -format used by this microprocessor. These macros should not be set to the -same value. The following example illustrates how these macros should be -set on a processor family that is big endian. +The ``CPU_BIG_ENDIAN`` and ``CPU_LITTLE_ENDIAN`` are set to specify +the endian format used by this microprocessor. These macros should not +be set to the same value. The following example illustrates how these +macros should be set on a processor family that is big endian. + .. code-block:: c #define CPU_BIG_ENDIAN TRUE @@ -82,6 +84,7 @@ stack space above the minimum thread stack space required by the MPCI Receive Server Thread. This macro is needed because in a multiprocessor system the MPCI Receive Server Thread must be able to process all directives. + .. code-block:: c #define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 0 @@ -108,19 +111,20 @@ code and data - so the code will be fetched incorrectly. The following is an implementation of the ``CPU_swap_u32`` routine that will work on any CPU. It operates by breaking the unsigned thirty-two bit integer into four byte-wide quantities and reassemblying them. + .. code-block:: c static inline unsigned int CPU_swap_u32( - unsigned int value + unsigned int value ) { - unsigned32 byte1, byte2, byte3, byte4, swapped; - byte4 = (value >> 24) & 0xff; - byte3 = (value >> 16) & 0xff; - byte2 = (value >> 8) & 0xff; - byte1 = value & 0xff; - swapped = (byte1 << 24) | (byte2 << 16) | (byte3 << 8) | byte4; - return( swapped ); + unsigned32 byte1, byte2, byte3, byte4, swapped; + byte4 = (value >> 24) & 0xff; + byte3 = (value >> 16) & 0xff; + byte2 = (value >> 8) & 0xff; + byte1 = value & 0xff; + swapped = (byte1 << 24) | (byte2 << 16) | (byte3 << 8) | byte4; + return( swapped ); } Although the above implementation is portable, it is not particularly @@ -133,6 +137,7 @@ family of routines. Most microprocessor families have rotate instructions which can be used to greatly improve the ``CPU_swap_u32`` routine. The most common way to do this is to: + .. code-block:: c swap least significant two bytes with 16-bit rotate @@ -150,8 +155,9 @@ code and data - so the code will be fetched incorrectly. Similarly, here is a portable implementation of the ``CPU_swap_u16`` routine. Just as with the ``CPU_swap_u32`` routine, the porter should provide a better implementation if possible. + .. code-block:: c #define CPU_swap_u16( value ) \\ - (((value&0xff) << 8) | ((value >> 8)&0xff)) + (((value&0xff) << 8) | ((value >> 8)&0xff)) -- cgit v1.2.3