From 7497f5ed9a2cebe06619987e295cae529dde9fad Mon Sep 17 00:00:00 2001
From: Joel Sherrill <joel@rtems.org>
Date: Fri, 28 Oct 2016 15:57:11 -0500
Subject: porting: Review and tidy up multiple formatting issues.

---
 porting/idle_thread.rst | 31 +++++++++++++++++--------------
 1 file changed, 17 insertions(+), 14 deletions(-)

(limited to 'porting/idle_thread.rst')

diff --git a/porting/idle_thread.rst b/porting/idle_thread.rst
index 317cf2a..767c320 100644
--- a/porting/idle_thread.rst
+++ b/porting/idle_thread.rst
@@ -1,5 +1,9 @@
 .. comment SPDX-License-Identifier: CC-BY-SA-4.0
 
+.. COMMENT: COPYRIGHT (c) 1988-2002.
+.. COMMENT: On-Line Applications Research Corporation (OAR).
+.. COMMENT: All rights reserved.
+
 IDLE Thread
 ###########
 
@@ -7,10 +11,11 @@ Does Idle Thread Have a Floating Point Context?
 ===============================================
 
 The setting of the macro CPU_IDLE_TASK_IS_FP is based on the answer to the
-question:  Should the IDLE task have a floating point context?  If the
-answer to this question is TRUE, then the IDLE task has a floating point
-context associated.  This is equivalent to creating a task in the Classic
-API (using rtems_task_create) as a RTEMS_FLOATING_POINT task.  If
+question:  Should the IDLE task have a floating point context?
+
+If the answer to this question is TRUE, then the IDLE task has a floating
+point context associated.  This is equivalent to creating a task in the
+Classic API (using rtems_task_create) as a RTEMS_FLOATING_POINT task. If
 CPU_IDLE_TASK_IS_FP is set to TRUE, then a floating point context switch
 occurs when the IDLE task is switched in and out.  This adds to the
 execution overhead of the system but is necessary on some ports.
@@ -22,6 +27,7 @@ required to preempt the IDLE task from an interrupt because the floating
 point context must be saved as part of the preemption.
 
 The following illustrates how to set this macro:
+
 .. code-block:: c
 
     #define CPU_IDLE_TASK_IS_FP      FALSE
@@ -49,13 +55,14 @@ powered down when the processor is idle.
 
 The order of precedence for selecting the IDLE thread body is:
 
-# BSP provided
+#. BSP provided
 
-# CPU dependent (if provided)
+#. CPU dependent (if provided)
 
-# generic (if no BSP and no CPU dependent)
+#. generic (if no BSP and no CPU dependent)
 
 The following illustrates setting the CPU_PROVIDES_IDLE_THREAD_BODY macro:
+
 .. code-block:: c
 
     #define CPU_PROVIDES_IDLE_THREAD_BODY    TRUE
@@ -71,6 +78,7 @@ wishes to include a CPU dependent IDLE thread body.  If the port includes
 a CPU dependent implementation of the IDLE thread body, then the
 CPU_PROVIDES_IDLE_THREAD_BODY macro should be defined to TRUE.  This
 routine is prototyped as follows:
+
 .. code-block:: c
 
     void *_CPU_Thread_Idle_body( uintptr_t );
@@ -80,6 +88,7 @@ thread body be provided as part of the port.  If
 CPU_PROVIDES_IDLE_THREAD_BODY is defined to FALSE, then the CPU
 independent algorithm is used.  This algorithm consists of a "branch to
 self" which is implemented in a routine as follows.
+
 .. code-block:: c
 
     void *_Thread_Idle_body( uintptr_t ignored )
@@ -91,6 +100,7 @@ If the CPU dependent IDLE thread body is implementation centers upon using
 a "halt", "idle", or "shutdown" instruction, then don't forget to put it
 in an infinite loop as the CPU will have to reexecute this instruction
 each time the IDLE thread is dispatched.
+
 .. code-block:: c
 
     void *_CPU_Thread_Idle_body( uintptr_t ignored )
@@ -102,10 +112,3 @@ each time the IDLE thread is dispatched.
 Be warned. Some processors with onboard DMA have been known to stop the
 DMA if the CPU were put in IDLE mode.  This might also be a problem with
 other on-chip peripherals.  So use this hook with caution.
-
-.. COMMENT: COPYRIGHT (c) 1988-2002.
-
-.. COMMENT: On-Line Applications Research Corporation (OAR).
-
-.. COMMENT: All rights reserved.
-
-- 
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