From d389819eea3a84e388935153e3be847342809da3 Mon Sep 17 00:00:00 2001 From: Amar Takhar Date: Mon, 18 Jan 2016 00:37:40 -0500 Subject: Convert all Unicode to ASCII(128) --- networking/dec_21140.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'networking/dec_21140.rst') diff --git a/networking/dec_21140.rst b/networking/dec_21140.rst index 8cc041c..9064508 100644 --- a/networking/dec_21140.rst +++ b/networking/dec_21140.rst @@ -46,7 +46,7 @@ DEC21140 PCI Board Generalities This chapter describes rapidely the PCI interface of this Ethernet controller. The board we have chosen for our PC386 implementation is a D-Link DFE-500TX. This is a dual-speed 10/100Mbps Ethernet PCI adapter with a DEC21140AF chip. -Like other PCI devices, this board has a PCI device’s header containing some +Like other PCI devices, this board has a PCI device's header containing some required configuration registers, as shown in the PCI Register Figure. By reading or writing these registers, a driver can obtain information about the type of @@ -132,7 +132,7 @@ Receiver Thread --------------- This thread is event driven. Each time a DEC PCI board interrupt occurs, the -handler checks if this is a receive interrupt and send an event “reception” +handler checks if this is a receive interrupt and send an event "reception" to the receiver thread which looks into the entire buffer descriptors ring the ones that contain a valid incoming frame (bit OWN=0 means descriptor belongs to host processor). Each valid incoming ethernet frame is sent to the protocol -- cgit v1.2.3