From 0c978901d082c88a74f269ddf184438300c58213 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Fri, 28 Oct 2016 13:07:04 -0500 Subject: powerpc, sparc, sparc64: Correct tables --- cpu_supplement/powerpc.rst | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'cpu_supplement/powerpc.rst') diff --git a/cpu_supplement/powerpc.rst b/cpu_supplement/powerpc.rst index 5204ebc..3c5eb5c 100644 --- a/cpu_supplement/powerpc.rst +++ b/cpu_supplement/powerpc.rst @@ -373,14 +373,14 @@ architecture does not require the processor to generate alignment exceptions. The following table lists the alignment requirements for a variety of data accesses: -+--------------+-----------------------+ -| Data Type | Alignment Requirement | -+--------------+-----------------------+ -| byte | 1 | -| half-word | 2 | -| word | 4 | -| doubleword | 8 | -+--------------+-----------------------+ +============== ====================== +Data Type Alignment Requirement +============== ====================== +byte 1 +half-word 2 +word 4 +doubleword 8 +============== ====================== Doubleword load and store operations are only available in PowerPC CPU models which are sixty-four bit implementations. -- cgit v1.2.3