From 6297ad31d09bb5c0bddda418881296b7cbd20152 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Thu, 10 Nov 2016 10:16:03 +0100 Subject: cpu-supplement: Document PowerPC SPRG0-2 usage --- cpu-supplement/powerpc.rst | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'cpu-supplement') diff --git a/cpu-supplement/powerpc.rst b/cpu-supplement/powerpc.rst index b84c2b4..cd7847b 100644 --- a/cpu-supplement/powerpc.rst +++ b/cpu-supplement/powerpc.rst @@ -270,6 +270,17 @@ Special Registers The PowerPC architecture includes a number of special registers which are critical to the programming model: +*Special-Purpose Register General 0 (SPRG0)* + On SMP configurations, this register contains the address of the per-CPU + control of the processor. + +*Special-Purpose Register General 1 (SPRG1)* + This register contains the interrupt stack pointer for the outer-most + interrupt service routine. + +*Special-Purpose Register General 2 (SPRG2)* + This register contains the address of interrupt stack area begin. + *Machine State Register* The MSR contains the processor mode, power management mode, endian mode, exception information, privilege level, floating point available and -- cgit v1.2.3