From c9f5e20d3168703ea1940e1ae70926e541eafdf9 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Thu, 19 Dec 2019 09:04:23 +0100 Subject: user: Mention xilinx-zynqmp BSP Close #3682. --- user/bsps/arm/xilinx-zynqmp.rst | 8 ++++++++ user/bsps/bsps-arm.rst | 1 + 2 files changed, 9 insertions(+) create mode 100644 user/bsps/arm/xilinx-zynqmp.rst diff --git a/user/bsps/arm/xilinx-zynqmp.rst b/user/bsps/arm/xilinx-zynqmp.rst new file mode 100644 index 0000000..9a605bb --- /dev/null +++ b/user/bsps/arm/xilinx-zynqmp.rst @@ -0,0 +1,8 @@ +.. SPDX-License-Identifier: CC-BY-SA-4.0 + +.. Copyright (C) 2019 embedded brains GmbH + +xilinx-zynqmp +============= + +This BSP supports the Xilinx Zynq UltraScale+ MPSoC platform. diff --git a/user/bsps/bsps-arm.rst b/user/bsps/bsps-arm.rst index 1260529..04f9e86 100644 --- a/user/bsps/bsps-arm.rst +++ b/user/bsps/bsps-arm.rst @@ -26,3 +26,4 @@ arm (ARM) .. include:: arm/stm32f4.rst .. include:: arm/tms570.rst .. include:: arm/xilinx-zynq.rst +.. include:: arm/xilinx-zynqmp.rst -- cgit v1.2.3