From 99a84f904c9d85b1f50975765fec96123c542d32 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Thu, 9 Aug 2018 08:42:28 -0500 Subject: Fix SPARC_SWTRAP_IRQDIS typo close #3493. --- cpu-supplement/sparc.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cpu-supplement/sparc.rst b/cpu-supplement/sparc.rst index bb94435..c0924b8 100644 --- a/cpu-supplement/sparc.rst +++ b/cpu-supplement/sparc.rst @@ -658,7 +658,7 @@ as non-maskable interrupts. Interrupts are disabled or enabled by performing a system call to the Operating System reserved software traps 9 (SPARC_SWTRAP_IRQDIS) or 10 -(SPARC_SWTRAP_IRQDIS). The trap is generated by the software trap (Ticc) +(SPARC_SWTRAP_IRQEN). The trap is generated by the software trap (Ticc) instruction or indirectly by calling sparc_disable_interrupts() or sparc_enable_interrupts() functions. Disabling interrupts return the previous interrupt level (on trap entry) in register G1 and sets PSR.PIL to 15 to -- cgit v1.2.3