From 4e71fe26875dcde8258e6edc305c6f36d9811520 Mon Sep 17 00:00:00 2001 From: Chris Johns Date: Fri, 28 Oct 2016 09:14:59 -0700 Subject: bsp_howto: Fix ASCII figure. --- bsp_howto/initilization_code.rst | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/bsp_howto/initilization_code.rst b/bsp_howto/initilization_code.rst index fb491cf..5899bb2 100644 --- a/bsp_howto/initilization_code.rst +++ b/bsp_howto/initilization_code.rst @@ -313,17 +313,17 @@ When the microprocessor accesses a memory area, address decoding is handled by an address decoder, so that the microprocessor knows which memory chip(s) to access. The following figure illustrates this: -.. code-block:: - - +-------------------+ - ------------| | - ------------| |------------ - ------------| Address |------------ - ------------| Decoder |------------ - ------------| |------------ - ------------| | - +-------------------+ - CPU Bus Chip Select +.. code-block:: c + + +-------------------+ + ------------| | + ------------| |------------ + ------------| Address |------------ + ------------| Decoder |------------ + ------------| |------------ + ------------| | + +-------------------+ + CPU Bus Chip Select The Chip Select registers must be programmed such that they match the ``linkcmds`` settings. In the gen68340 BSP, ROM and RAM addresses can be found -- cgit v1.2.3