diff options
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu-supplement/sparc.rst b/cpu-supplement/sparc.rst
index e0f5240..57b6062 100644
--- a/cpu-supplement/sparc.rst
+++ b/cpu-supplement/sparc.rst
@@ -641,7 +641,7 @@ as non-maskable interrupts.
Interrupts are disabled or enabled by performing a system call to the Operating
System reserved software traps 9 (SPARC_SWTRAP_IRQDIS) or 10
-(SPARC_SWTRAP_IRQDIS). The trap is generated by the software trap (Ticc)
+(SPARC_SWTRAP_IRQEN). The trap is generated by the software trap (Ticc)
instruction or indirectly by calling sparc_disable_interrupts() or
sparc_enable_interrupts() functions. Disabling interrupts return the previous
interrupt level (on trap entry) in register G1 and sets PSR.PIL to 15 to