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authorChristian Mauderer <christian.mauderer@embedded-brains.de>2020-04-01 15:14:57 +0200
committerChristian Mauderer <christian.mauderer@embedded-brains.de>2020-04-15 17:13:48 +0200
commit01b1f479a3c13ca64bd07d0e8b43eb06a43c0591 (patch)
treec23ba127a4f9f58635926334000ed79510a26d11 /user/bsps/arm
parentc-user: Fix RTEMS_SCHEDULER_EDF_SMP() (diff)
downloadrtems-docs-01b1f479a3c13ca64bd07d0e8b43eb06a43c0591.tar.bz2
user/imx: Add i.MX6UL/ULL.
Update #3869
Diffstat (limited to 'user/bsps/arm')
-rw-r--r--user/bsps/arm/imx.rst47
1 files changed, 44 insertions, 3 deletions
diff --git a/user/bsps/arm/imx.rst b/user/bsps/arm/imx.rst
index bc93ae3..ee98f0b 100644
--- a/user/bsps/arm/imx.rst
+++ b/user/bsps/arm/imx.rst
@@ -7,9 +7,10 @@ imx (NXP i.MX)
==============
This BSP offers only one variant, the `imx7`. This variant supports the i.MX
-7Dual processor. The basic hardware initialization is not performed by the
-BSP. A boot loader with device tree support must be used to start the BSP,
-e.g. U-Boot.
+7Dual processor and the i.MX 6UL/ULL processor family (with slightly different
+clock settings). The basic hardware initialization is not performed by the BSP.
+A boot loader with device tree support must be used to start the BSP, e.g.
+U-Boot or barebox.
Build Configuration Options
---------------------------
@@ -40,9 +41,30 @@ The following options are available at the configure command line.
``IMX_CCM_UART_HZ``
The UART clock frequency in Hz (default is 24000000).
+``IMX_CCM_ECSPI_HZ``
+ The ECSPI clock frequency in Hz (default is 67500000).
+
``IMX_CCM_AHB_HZ``
The AHB clock frequency in Hz (default is 135000000).
+``IMX_CCM_SDHCI_HZ``
+ The SDHCI clock frequency in Hz (default is 196363000).
+
+Clock settings for different boards
+-----------------------------------
+
+The default clock settings are targeted for an i.MX 7Dual evaluation board using
+U-Boot. Some other boards with different boot loaders need different settings:
+
+ * Phytec phyCORE-i.MX 6ULL (system on module) with MCIMX6Y2CVM08AB and a
+ barebox bootloader (version ``2019.01.0-bsp-yocto-i.mx6ul-pd19.1.0``):
+
+ * IMX_CCM_IPG_HZ=66000000
+ * IMX_CCM_UART_HZ=80000000
+ * IMX_CCM_AHB_HZ=66000000
+ * IMX_CCM_SDHCI_HZ=198000000
+ * IMX_CCM_ECSPI_HZ=60000000
+
Boot via U-Boot
---------------
@@ -65,6 +87,14 @@ The ``loadfdt`` command may be not defined in your U-Boot environment. Just
replace it with the appropriate commands to load the device tree at
``${fdt_addr}``.
+Boot via barebox
+----------------
+
+The same command like for U-Boot can be used to generate an application image.
+In a default configuration barebox expects an fdt image called `oftree` and a
+kernel image called `zImage` in the root folder of the bootable medium (e.g. an
+SD card).
+
Clock Driver
------------
@@ -133,6 +163,17 @@ system controls:
A value of zero for the time or count disables the interrupt coalescing in the
corresponding direction.
+On the Phytec phyCORE-i.MX 6ULL modules the PHY needs an initialization for the
+clock. A special PHY driver handles that (``ksz8091rnb``). Add it to your libbsd
+config like that:
+
+.. code-block:: c
+
+ #define RTEMS_BSD_CONFIG_BSP_CONFIG
+ #define RTEMS_BSD_CONFIG_INIT
+ SYSINIT_DRIVER_REFERENCE(ksz8091rnb, miibus);
+ #include <machine/rtems-bsd-config.h>
+
MMC/SDCard Driver
-----------------