diff options
author | Kinsey Moore <kinsey.moore@oarcorp.com> | 2024-03-27 11:55:09 -0500 |
---|---|---|
committer | Joel Sherrill <joel@rtems.org> | 2024-04-11 15:54:40 -0500 |
commit | 8597e8e984e446354a3553fea55d94e154aba42d (patch) | |
tree | a886862c619f08619628bcb766e6d4733d0bd5fb /user/bsps/arm | |
parent | bsp-howto: Document clock driver arg parameter (diff) | |
download | rtems-docs-master.tar.bz2 |
This adds some information about loading the RPU TCMs from A53 u-boot
and additional information about debugging the RPU within QEMU since it
is non-standard.
Diffstat (limited to '')
-rw-r--r-- | user/bsps/arm/xilinx-zynqmp-rpu.rst | 35 |
1 files changed, 27 insertions, 8 deletions
diff --git a/user/bsps/arm/xilinx-zynqmp-rpu.rst b/user/bsps/arm/xilinx-zynqmp-rpu.rst index a29cb84..0dfb77e 100644 --- a/user/bsps/arm/xilinx-zynqmp-rpu.rst +++ b/user/bsps/arm/xilinx-zynqmp-rpu.rst @@ -35,14 +35,13 @@ it is recommended to use Cortex-A53 u-boot to avoid repeated BOOT.bin generation since the provided Cortex-R5 u-boot is highly limited and has no network or MMC/SD access. -Note that if the RPU image is started by the Cortex-A53 u-boot, the BSP -configuration must be updated to move ZYNQMP_RPU_RAM_INT_0_ORIGIN and -ZYNQMP_RPU_RAM_INT_1_ORIGIN into DDR since the TCMs are not directly available -to the Cortex-A53 cores at their Cortex-R5 internal addresses. Alternatively, -those sections could be copied to the TCMs using their global addresses, but -this must be done using additional commands within u-boot. If this is not taken -into account, the Cortex-R5 CPU will fail to boot correctly since execution -will jump into uninitialized TCM. +Note that if the RPU image is started by the Cortex-A53 u-boot, the program +sections located at ZYNQMP_RPU_RAM_INT_0_ORIGIN and ZYNQMP_RPU_RAM_INT_1_ORIGIN +must be manually relocated from DDR to TCM since the TCMs are not directly +available to the Cortex-A53 cores at their Cortex-R5 internal addresses. This +can be accomplished by disabling dcache in u-boot and using u-boot's "cp" +command. Once this is done, the program can be started at 0x0 by using u-boot's +"cpu" command to first disable core 4 and then release it in split mode. Hardware Boot Image Generation ------------------------------ @@ -74,3 +73,23 @@ following command: -device loader,addr=0xff9a0000,data=0x80000218,data-len=4 \ -hw-dtb /xlnx-qemu-devtrees-path/LATEST/SINGLE_ARCH/board-zynqmp-zcu102.dtb \ -m 4096 -display none + +Debugging Executables on QEMU +----------------------------- + +Debugging the RPU cores under QEMU presents unique challenges due to requiring +the AArch64 QEMU to emulate the entire processing subsystem. Debugging requires +a multi-arch GDB which can be created by adding "--enable-targets=all" to the +normal GDB configure line and then building as normal. + +To attach to the RPU core once QEMU is started with "-s -S", The following steps +are required: + +.. code-block:: shell + + aarch64-rtems6-gdb + (gdb) tar ext :1234 + (gdb) add-inferior + (gdb) inferior 2 + (gdb) file example.exe + (gdb) attach 2 |