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| author | Chris Johns <chrisj@rtems.org> | 2016-10-28 09:14:59 -0700 |
|---|---|---|
| committer | Chris Johns <chrisj@rtems.org> | 2016-10-28 09:14:59 -0700 |
| commit | 4e71fe26875dcde8258e6edc305c6f36d9811520 (patch) | |
| tree | da405146813f74b84e266914f6d3d1f9a3db5f91 /bsp_howto | |
| parent | c_user: Remove errors and warnings. (diff) | |
| download | rtems-docs-4e71fe26875dcde8258e6edc305c6f36d9811520.tar.bz2 | |
bsp_howto: Fix ASCII figure.
Diffstat (limited to 'bsp_howto')
| -rw-r--r-- | bsp_howto/initilization_code.rst | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/bsp_howto/initilization_code.rst b/bsp_howto/initilization_code.rst index fb491cf..5899bb2 100644 --- a/bsp_howto/initilization_code.rst +++ b/bsp_howto/initilization_code.rst @@ -313,17 +313,17 @@ When the microprocessor accesses a memory area, address decoding is handled by an address decoder, so that the microprocessor knows which memory chip(s) to access. The following figure illustrates this: -.. code-block:: - - +-------------------+ - ------------| | - ------------| |------------ - ------------| Address |------------ - ------------| Decoder |------------ - ------------| |------------ - ------------| | - +-------------------+ - CPU Bus Chip Select +.. code-block:: c + + +-------------------+ + ------------| | + ------------| |------------ + ------------| Address |------------ + ------------| Decoder |------------ + ------------| |------------ + ------------| | + +-------------------+ + CPU Bus Chip Select The Chip Select registers must be programmed such that they match the ``linkcmds`` settings. In the gen68340 BSP, ROM and RAM addresses can be found |