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| author | Joel Sherrill <joel@rtems.org> | 2016-10-27 19:27:02 -0500 |
|---|---|---|
| committer | Joel Sherrill <joel@rtems.org> | 2016-10-27 19:27:02 -0500 |
| commit | 2b175c323836ceb3bfcf0f5e32409c8bb570a89b (patch) | |
| tree | 0df873eaf6f14f62897c0635020d10470ef80c66 /bsp_howto/initilization_code.rst | |
| parent | Merge branch 'master' of ssh://dispatch.rtems.org/data/git/rtems-docs (diff) | |
| download | rtems-docs-2b175c323836ceb3bfcf0f5e32409c8bb570a89b.tar.bz2 | |
initilization_code.rst: Fix figure formatting
Diffstat (limited to 'bsp_howto/initilization_code.rst')
| -rw-r--r-- | bsp_howto/initilization_code.rst | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/bsp_howto/initilization_code.rst b/bsp_howto/initilization_code.rst index 516362f..a082845 100644 --- a/bsp_howto/initilization_code.rst +++ b/bsp_howto/initilization_code.rst @@ -316,14 +316,14 @@ access. The following figure illustrates this: .. code:: +-------------------+ - ------------| | - ------------| |------------ - ------------| Address |------------ - ------------| Decoder |------------ - ------------| |------------ - ------------| | + ------------| | + ------------| |------------ + ------------| Address |------------ + ------------| Decoder |------------ + ------------| |------------ + ------------| | +-------------------+ - CPU Bus Chip Select + CPU Bus Chip Select The Chip Select registers must be programmed such that they match the ``linkcmds`` settings. In the gen68340 BSP, ROM and RAM addresses can be found |