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| author | Kinsey Moore <kinsey.moore@oarcorp.com> | 2020-09-25 08:51:41 -0500 |
|---|---|---|
| committer | Joel Sherrill <joel@rtems.org> | 2020-10-05 16:14:47 -0500 |
| commit | d75b31f1e20fb942c9b737e2dd236266515f6456 (patch) | |
| tree | 850e6cb8cf525db104e271f492138a779d0bb689 | |
| parent | eng: Clarify stlib build attribute (diff) | |
| download | rtems-docs-d75b31f1e20fb942c9b737e2dd236266515f6456.tar.bz2 | |
cpu-supplement: Fix formatting and missing words
| -rw-r--r-- | cpu-supplement/arm.rst | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/cpu-supplement/arm.rst b/cpu-supplement/arm.rst index 63aa532..ac9e8c6 100644 --- a/cpu-supplement/arm.rst +++ b/cpu-supplement/arm.rst @@ -34,10 +34,10 @@ for the values. Count Leading Zeroes Instruction -------------------------------- -The ARMv5 and later has the count leading zeroes ``clz`` instruction which -could be used to speed up the find first bit operation. The use of this -instruction should significantly speed up the scheduling associated with a -thread blocking. This is currently not used. +The ARMv5 and later instruction sets have the count leading zeroes ``clz`` +instruction which could be used to speed up the find first bit operation. The +use of this instruction should significantly speed up the scheduling associated +with a thread blocking. This is currently not used. Floating Point Unit ------------------- @@ -130,7 +130,7 @@ Memory Model ============ A flat 32-bit memory model is supported. The board support package must take -care about the MMU if necessary. +care of initializing the MMU if necessary. Interrupt Processing ==================== @@ -194,13 +194,13 @@ actions: Symmetric Multiprocessing ========================= -SMP is supported on ARMv7-A. Available platforms are +SMP is supported on ARMv7-A. Available platforms are: -- Altera Cyclone V, +- Altera Cyclone V -- NXP i.MX 7, and +- NXP i.MX 7 -- Xilinx Zynq. +- Xilinx Zynq Thread-Local Storage ==================== |