SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
brief: |
  This structure defines the ${.:/register-block-group} register block memory
  map.
copyrights:
- Copyright (C) 2021 embedded brains GmbH & Co. KG
description: null
enabled-by: true
identifier: RTEMSDeviceGRSPW2DMA
index-entries: []
interface-type: register-block
links:
- role: interface-ingroup
  uid: grspw2
- role: interface-placement
  uid: grspw2-header
definition:
- default:
    count: 1
    name: DMACTRL
  offset: 0x0
  variants: []
- default:
    count: 1
    name: DMAMAXLEN
  offset: 0x4
  variants: []
- default:
    count: 1
    name: DMATXDESC
  offset: 0x8
  variants: []
- default:
    count: 1
    name: DMARXDESC
  offset: 0xc
  variants: []
- default:
    count: 1
    name: DMAADDR
  offset: 0x10
  variants: []
register-prefix: grspw2
register-block-group: GRSPW2 DMA
register-block-size: 32
registers:
- bits:
  - default:
    - properties: [r, w]
      brief: null
      description: null
      name: 'INTNUM'
      start: 26
      width: 6
    - properties: [r]
      brief: null
      description: null
      name: 'RES'
      start: 24
      width: 2
    - properties: [r, w1c]
      brief: null
      description: null
      name: 'EP'
      start: 23
      width: 1
    - properties: [r, w1c]
      brief: null
      description: null
      name: 'TR'
      start: 22
      width: 1
    - properties: [r, w]
      brief: null
      description: null
      name: 'IE'
      start: 21
      width: 1
    - properties: [r, w]
      brief: null
      description: null
      name: 'IT'
      start: 20
      width: 1
    - properties: [r, w1c]
      brief: null
      description: null
      name: 'RP'
      start: 19
      width: 1
    - properties: [r, w1c]
      brief: null
      description: null
      name: 'TP'
      start: 18
      width: 1
    - properties: [r, w1c]
      brief: null
      description: null
      name: 'TL'
      start: 17
      width: 1
    - properties: [r, w]
      brief: null
      description: null
      name: 'LE'
      start: 16
      width: 1
    - properties: [r, w]
      brief: null
      description: null
      name: 'SP'
      start: 15
      width: 1
    - properties: [r, w]
      brief: null
      description: null
      name: 'SA'
      start: 14
      width: 1
    - properties: [r, w]
      brief: null
      description: null
      name: 'EN'
      start: 13
      width: 1
    - properties: [r, w]
      brief: null
      description: null
      name: 'NS'
      start: 12
      width: 1
    - properties: [r, w]
      brief: null
      description: null
      name: 'RD'
      start: 11
      width: 1
    - properties: [r]
      brief: null
      description: null
      name: 'RX'
      start: 10
      width: 1
    - properties: [r, w]
      brief: null
      description: null
      name: 'AT'
      start: 9
      width: 1
    - properties: [r, w1c]
      brief: null
      description: null
      name: 'RA'
      start: 8
      width: 1
    - properties: [r, w1c]
      brief: null
      description: null
      name: 'TA'
      start: 7
      width: 1
    - properties: [r, w1c]
      brief: null
      description: null
      name: 'PR'
      start: 6
      width: 1
    - properties: [r, w1c]
      brief: null
      description: null
      name: 'PS'
      start: 5
      width: 1
    - properties: [r, w]
      brief: null
      description: null
      name: 'AI'
      start: 4
      width: 1
    - properties: [r, w]
      brief: null
      description: null
      name: 'RI'
      start: 3
      width: 1
    - properties: [r, w]
      brief: null
      description: null
      name: 'TI'
      start: 2
      width: 1
    - properties: [r, w]
      brief: null
      description: null
      name: 'RE'
      start: 1
      width: 1
    - properties: [r, w]
      brief: null
      description: null
      name: 'TE'
      start: 0
      width: 1
    variants: []
  brief: |
    DMA control/status
  description: null
  name: DMACTRL
  width: 32
- bits:
  - default:
    - properties: [r, w]
      brief: null
      description: null
      name: 'RXMAXLEN'
      start: 2
      width: 23
    - properties: [r]
      brief: null
      description: null
      name: 'RES'
      start: 0
      width: 2
    variants: []
  brief: |
    DMA RX maximum length
  description: null
  name: DMAMAXLEN
  width: 32
- bits:
  - default:
    - properties: [r, w]
      brief: null
      description: null
      name: 'DESCBASEADDR'
      start: 0
      width: 32
    - properties: [r, w]
      brief: null
      description: null
      name: 'DESCSEL'
      start: 4
      width: 28
    variants: []
  brief: |
    DMA transmit descriptor table address
  description: null
  name: DMATXDESC
  width: 32
- bits:
  - default:
    - properties: [r, w]
      brief: null
      description: null
      name: 'DESCBASEADDR'
      start: 10
      width: 22
    - properties: [r, w]
      brief: null
      description: null
      name: 'DESCSEL'
      start: 3
      width: 7
    variants: []
  brief: |
    DMA receive descriptor table address
  description: null
  name: DMARXDESC
  width: 32
- bits:
  - default:
    - properties: [r, w]
      brief: null
      description: null
      name: 'MASK'
      start: 8
      width: 8
    - properties: [r, w]
      brief: null
      description: null
      name: 'ADDR'
      start: 0
      width: 8
    variants: []
  brief: |
    DMA address
  description: null
  name: DMAADDR
  width: 32
name: grspw2_dma
notes: null
type: interface