diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-12-04 13:34:53 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-12-04 13:35:20 +0100 |
| commit | c73cdc716033405108ce752292f2f7628df2a627 (patch) | |
| tree | e574b74a60b6ef789516ce628cbdaf4f222da8d1 | |
| parent | spec: Use unspecified-function (diff) | |
| download | rtems-central-c73cdc716033405108ce752292f2f7628df2a627.tar.bz2 | |
Revert "spec: Workaround for broken document generator"
This reverts commit 45494f7663d4d84655a1bde7fd8097329117c75d.
| -rw-r--r-- | spec/score/cpu/val/fatal-halt-sparc.yml | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/spec/score/cpu/val/fatal-halt-sparc.yml b/spec/score/cpu/val/fatal-halt-sparc.yml index ace31b3a..0055347f 100644 --- a/spec/score/cpu/val/fatal-halt-sparc.yml +++ b/spec/score/cpu/val/fatal-halt-sparc.yml @@ -15,8 +15,8 @@ references: type: file text: | Inspection of the referenced ${/glossary/sourcecode:/term} files showed that - the function is implemented as specified. In addition, the instruction - sequence of the directive was executed in assembler single step mode under - control of a debugger on the SPARC/RISCV instruction simulator version 2.29 - to validate that its function is as specified. + the ${../if/fatal-halt:/name} directive is implemented as specified. In + addition, the instruction sequence of the directive was executed in assembler + single step mode under control of a debugger on the SPARC/RISCV instruction + simulator version 2.29 to validate that its function is as specified. type: validation |