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Use the following variant which was already used by most source files:
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
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The CPU index starts with zero. Increment it by one, to allow global
SMP locks to reside in the BSS section.
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The SMP ticket lock release turned out to be suitable for inlining, e.g.
a hand full of instructions, no branches.
The changes in the screen files do not reflect the changes due to this
commit. However, they are now up to date. Obtained on a T4240 running
at 1.5GHz using GCC 7.0.0 20161108..
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Use non-inline SMP lock acquire and release operations by default.
Provide inline variants for the hot spots, e.g. mutex acquire/release.
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Rename _ISR_Disable_without_giant() into _ISR_Local_disable(). Rename
_ISR_Enable_without_giant() into _ISR_Local_enable().
This is a preparation to remove the Giant lock.
Update #2555.
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Ensure matching lock acquire and release for SMP locks if RTEMS_DEBUG is
defined.
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This reduces the code size drastically.
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Move the SMP lock implementation to the CPU port. An optimal SMP lock
implementation is highly architecture dependent. For example the memory
models may be fundamentally different.
The new SMP lock API has a flaw. It does not provide the ability to use
a local context for acquire and release pairs. Such a context is
necessary to implement for example the Mellor-Crummey and Scott (MCS)
locks. The SMP lock is currently used in _Thread_Disable_dispatch() and
_Thread_Enable_dispatch() and makes them to a giant lock acquire and
release. Since these functions do not pass state information via a
local context there is currently no use case for such a feature.
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This patch is a task from GCI 2012 which improves the Doxygen
comments in the RTEMS source.
http://www.google-melange.com/gci/task/view/google/gci2012/7982215
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Script does what is expected and tries to do it as
smartly as possible.
+ remove occurrences of two blank comment lines
next to each other after Id string line removed.
+ remove entire comment blocks which only exited to
contain CVS Ids
+ If the processing left a blank line at the top of
a file, it was removed.
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PR 1935/cpukit
* score/include/rtems/score/smplock.h, score/src/smplock.c: SMP nested
count variable was being overritten when nested lock was taken more
than once.
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PR 1876
* score/Makefile.am, score/include/rtems/score/isr.h, score/src/isr.c,
score/src/smp.c, score/src/smplock.c, score/src/threaddispatch.c,
score/src/threaddispatchdisablelevel.c: Add smp isr support.
* score/src/isrsmp.c: New file.
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PR 1787/cpukit
* score/include/rtems/score/percpu.h,
score/include/rtems/score/smplock.h, score/src/smp.c,
score/src/smplock.c: Add nesting support to smp spinlock.
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PR 1729/cpukit
* configure.ac, sapi/include/confdefs.h, sapi/src/exinit.c,
score/Makefile.am, score/preinstall.am,
score/cpu/i386/rtems/score/cpu.h, score/cpu/sparc/cpu_asm.S,
score/cpu/sparc/rtems/score/cpu.h,
score/include/rtems/score/basedefs.h,
score/include/rtems/score/context.h,
score/include/rtems/score/percpu.h, score/src/percpu.c,
score/src/thread.c, score/src/threadcreateidle.c: Add next step in
SMP support. This adds an allocated array of the Per_CPU structures
to support multiple cpus vs a single instance of the structure which
is still used if SMP support is disabled. Configuration support is
also added to explicitly enable or disable SMP. But SMP can only be
enabled for the CPUs which will support it initially -- SPARC and
i386. With the stub BSP support, a BSP can be run as a single core
SMP system from an RTEMS data structure standpoint.
* aclocal/check-smp.m4, aclocal/enable-smp.m4,
score/include/rtems/bspsmp.h, score/include/rtems/score/smplock.h,
score/src/smp.c, score/src/smplock.c: New files.
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