From 7a6e198454d04ac6bf5f2009b4f693696c27e5c1 Mon Sep 17 00:00:00 2001 From: Jiri Gaisler Date: Fri, 8 Nov 2019 22:05:27 +0100 Subject: Support building on MinGW-W64/MSYS2 * Depends on MinGW64-readline to build --- riscv.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'riscv.c') diff --git a/riscv.c b/riscv.c index 7498fce..f1cc16d 100644 --- a/riscv.c +++ b/riscv.c @@ -1643,18 +1643,18 @@ riscv_dispatch_instruction (sregs) case 0: /* FSGNJ */ sregs->fsi[frd] = sregs->fsi[frs1]; sregs->fsi[frd + 1] = - (sregs->fsi[frs1 + 1] & 0x7fffffff) | (sregs-> - fsi[frs2 + + (sregs-> + fsi[frs1 + 1] & 0x7fffffff) | (sregs->fsi[frs2 + 1] & - 0x80000000); + 0x80000000); break; case 1: /* FSGNJN */ sregs->fsi[frd] = sregs->fsi[frs1]; sregs->fsi[frd + 1] = - (sregs->fsi[frs1 + 1] & 0x7fffffff) | (~sregs-> - fsi[frs2 + - 1] & - 0x80000000); + (sregs-> + fsi[frs1 + 1] & 0x7fffffff) | (~sregs->fsi[frs2 + + 1] & + 0x80000000); break; case 2: /* FSGNJX */ sregs->fsi[frd] = sregs->fsi[frs1]; @@ -1928,7 +1928,7 @@ riscv_execute_trap (sregs) sregs->trap = 0; break; case ERROR_TRAP: - return (ERROR); + return (ERROR_MODE); case WPT_TRAP: return (WPT_HIT); case NULL_TRAP: @@ -1994,7 +1994,7 @@ riscv_execute_trap (sregs) sregs->trap = 0; if (sregs->err_mode) - return (ERROR); + return (ERROR_MODE); } -- cgit v1.2.3