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Diffstat (limited to 'cpukit/score/cpu/mips/cpu.c')
-rw-r--r-- | cpukit/score/cpu/mips/cpu.c | 216 |
1 files changed, 0 insertions, 216 deletions
diff --git a/cpukit/score/cpu/mips/cpu.c b/cpukit/score/cpu/mips/cpu.c deleted file mode 100644 index 5088c2ad84..0000000000 --- a/cpukit/score/cpu/mips/cpu.c +++ /dev/null @@ -1,216 +0,0 @@ -/* - * Mips CPU Dependent Source - * - * Author: Craig Lebakken <craigl@transition.com> - * - * COPYRIGHT (c) 1996 by Transition Networks Inc. - * - * To anyone who acknowledges that this file is provided "AS IS" - * without any express or implied warranty: - * permission to use, copy, modify, and distribute this file - * for any purpose is hereby granted without fee, provided that - * the above copyright notice and this notice appears in all - * copies, and that the name of Transition Networks not be used in - * advertising or publicity pertaining to distribution of the - * software without specific, written prior permission. - * Transition Networks makes no representations about the suitability - * of this software for any purpose. - * - * Derived from c/src/exec/score/cpu/no_cpu/cpu.c: - * - * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. - * On-Line Applications Research Corporation (OAR). - * All rights assigned to U.S. Government, 1994. - * - * This material may be reproduced by or for the U.S. Government pursuant - * to the copyright license under the clause at DFARS 252.227-7013. This - * notice must appear in all copies of this file and its derivatives. - * - * $Id$ - */ - -#ifndef lint -static char _sccsid[] = "@(#)cpu.c 08/20/96 1.5\n"; -#endif - -#include <rtems/system.h> -#include <rtems/score/isr.h> -#include <rtems/score/wkspace.h> - - -ISR_Handler_entry _ISR_Vector_table[ ISR_NUMBER_OF_VECTORS ]; - -/* _CPU_Initialize - * - * This routine performs processor dependent initialization. - * - * INPUT PARAMETERS: - * cpu_table - CPU table to initialize - * thread_dispatch - address of disptaching routine - */ - - -void null_handler( void ) -{ -} - - -void _CPU_Initialize( - rtems_cpu_table *cpu_table, - void (*thread_dispatch) /* ignored on this CPU */ -) -{ - unsigned int i = ISR_NUMBER_OF_VECTORS; - - while ( i-- ) - { - _ISR_Vector_table[i] = (ISR_Handler_entry)null_handler; - } - - /* - * The thread_dispatch argument is the address of the entry point - * for the routine called at the end of an ISR once it has been - * decided a context switch is necessary. On some compilation - * systems it is difficult to call a high-level language routine - * from assembly. This allows us to trick these systems. - * - * If you encounter this problem save the entry point in a CPU - * dependent variable. - */ - - _CPU_Thread_dispatch_pointer = thread_dispatch; - - /* - * If there is not an easy way to initialize the FP context - * during Context_Initialize, then it is usually easier to - * save an "uninitialized" FP context here and copy it to - * the task's during Context_Initialize. - */ - - /* FP context initialization support goes here */ - - _CPU_Table = *cpu_table; - -} - -/*PAGE - * - * _CPU_ISR_Get_level - */ - -#if 0 /* located in cpu_asm.S */ -unsigned32 _CPU_ISR_Get_level( void ) -{ - /* - * This routine returns the current interrupt level. - */ -} -#endif - -/*PAGE - * - * _CPU_ISR_install_raw_handler - */ - -void _CPU_ISR_install_raw_handler( - unsigned32 vector, - proc_ptr new_handler, - proc_ptr *old_handler -) -{ - /* - * This is where we install the interrupt handler into the "raw" interrupt - * table used by the CPU to dispatch interrupt handlers. - */ - -#if 0 /* not necessary */ -/* use IDT/Sim to set interrupt vector. Needed to co-exist with debugger. */ - add_ext_int_func( vector, new_handler ); -#endif -} - -/*PAGE - * - * _CPU_ISR_install_vector - * - * This kernel routine installs the RTEMS handler for the - * specified vector. - * - * Input parameters: - * vector - interrupt vector number - * old_handler - former ISR for this vector number - * new_handler - replacement ISR for this vector number - * - * Output parameters: NONE - * - */ - -void _CPU_ISR_install_vector( - unsigned32 vector, - proc_ptr new_handler, - proc_ptr *old_handler -) -{ - *old_handler = _ISR_Vector_table[ vector ]; - - /* - * If the interrupt vector table is a table of pointer to isr entry - * points, then we need to install the appropriate RTEMS interrupt - * handler for this vector number. - */ - - _CPU_ISR_install_raw_handler( vector, _ISR_Handler, old_handler ); - - /* - * We put the actual user ISR address in '_ISR_vector_table'. This will - * be used by the _ISR_Handler so the user gets control. - */ - - _ISR_Vector_table[ vector ] = new_handler; -} - -/*PAGE - * - * _CPU_Install_interrupt_stack - */ - -void _CPU_Install_interrupt_stack( void ) -{ -/* we don't support this yet */ -} - -/*PAGE - * - * _CPU_Internal_threads_Idle_thread_body - * - * NOTES: - * - * 1. This is the same as the regular CPU independent algorithm. - * - * 2. If you implement this using a "halt", "idle", or "shutdown" - * instruction, then don't forget to put it in an infinite loop. - * - * 3. Be warned. Some processors with onboard DMA have been known - * to stop the DMA if the CPU were put in IDLE mode. This might - * also be a problem with other on-chip peripherals. So use this - * hook with caution. - */ - -#if 0 /* located in cpu_asm.S */ -void _CPU_Thread_Idle_body( void ) -{ - - for( ; ; ) - /* insert your "halt" instruction here */ ; -} -#endif - -extern void mips_break( int error ); - -#include <stdio.h> - -void mips_fatal_error( int error ) -{ - printf("fatal error 0x%x %d\n",error,error); - mips_break( error ); -} |