summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2014-06-24smptests/smpmigration02: PR2183: Add test caseHEADmasterSebastian Huber
2014-06-24score: Fix _Thread_Start_multitasking() on SMPSebastian Huber
The _CPU_Context_Restart_self() implementations usually assume that self context is executing. FIXME: We have a race condition in _Thread_Start_multitasking() in case another thread already performed scheduler operations and moved the heir thread to another processor. The time frame for this is likely too small to be practically relevant.
2014-06-23score: Fix thread deletion on SMPSebastian Huber
Close the thread object in _Thread_Make_zombie() so that all blocking operations that use _Thread_Get() in the corresponding release directive can find a terminating thread and can complete the operation.
2014-06-23score: Decouple thread and scheduler nodes on SMPSebastian Huber
Add a chain node to the scheduler node to decouple the thread and scheduler nodes. It is now possible to enqueue a thread in a thread wait queue and use its scheduler node at the same for other threads, e.g. a resouce owner.
2014-06-23score: Use chain nodes for ready queue supportSebastian Huber
This reduces the API to the minimum data structures to maximize the re-usability.
2014-06-23score: Collect scheduler related fields in TCBSebastian Huber
Add Thread_Scheduler_control to collect scheduler related fields of the TCB.
2014-06-23score: Remove scheduler parameter from most opsSebastian Huber
Remove the scheduler parameter from most high level scheduler operations like - _Scheduler_Block(), - _Scheduler_Unblock(), - _Scheduler_Change_priority(), - _Scheduler_Update_priority(), - _Scheduler_Release_job(), and - _Scheduler_Yield(). This simplifies the scheduler operations usage.
2014-06-20score: Use default get/set affinity operationSebastian Huber
Add and use SCHEDULER_OPERATION_DEFAULT_GET_SET_AFFINITY.
2014-06-20score: Fix statement with no effectSebastian Huber
2014-06-20score: Fix _Thread_Delay_ended() on SMPSebastian Huber
Suppose we have two tasks A and B and two processors. Task A is about to delete task B. Now task B calls rtems_task_wake_after(1) on the other processor. Task B will block on the Giant lock. Task A progresses with the task B deletion until it has to wait for termination. Now task B obtains the Giant lock, sets its state to STATES_DELAYING, initializes its watchdog timer and waits. Eventually _Thread_Delay_ended() is called, but now _Thread_Get() returned NULL since the thread is already marked as deleted. Thus task B remained forever in the STATES_DELAYING state. Instead of passing the thread identifier use the thread control block directly via the watchdog user argument. This makes _Thread_Delay_ended() also a bit more efficient.
2014-06-18smptests/smpwakeafter01: New testSebastian Huber
2014-06-13smptests: Avoid use of uninitialized dataSebastian Huber
2014-06-13JFFS2: Add device identifier for the flash deviceSebastian Huber
It is used in combination with the inode number to uniquely identify a file system node in the system.
2014-06-13score: Delete _Thread_Set_transient()Sebastian Huber
2014-06-13score: _Scheduler_priority_Get_scheduler_info()Sebastian Huber
Delete _Scheduler_priority_Get_scheduler_info().
2014-06-12score: PR2181: Add _Thread_Yield()Sebastian Huber
The _Scheduler_Yield() was called by the executing thread with thread dispatching disabled and interrupts enabled. The rtems_task_suspend() is explicitly allowed in ISRs: http://rtems.org/onlinedocs/doc-current/share/rtems/html/c_user/Interrupt-Manager-Directives-Allowed-from-an-ISR.html#Interrupt-Manager-Directives-Allowed-from-an-ISR Unlike the other scheduler operations the locking was performed inside the operation. This lead to the following race condition. Suppose a ISR suspends the executing thread right before the yield scheduler operation. Now the executing thread is not longer in the set of ready threads. The typical scheduler operations did not check the thread state and will now extract the thread again and enqueue it. This corrupted data structures. Add _Thread_Yield() and do the scheduler yield operation with interrupts disabled. This has a negligible effect on the interrupt latency.
2014-06-12bsp/realview-pbx-a9: Fix SMP startupSebastian Huber
2014-06-12smptests/smpscheduler03: Test all SMP schedulersSebastian Huber
2014-06-12score: Make functions inlineSebastian Huber
These functions are used only via the function pointers in the generic SMP scheduler implementation. Provide them as static inline so that the compiler can optimize more easily.
2014-06-12score: Move NULL pointer check to order functionSebastian Huber
This helps to avoid untestable code for the normal SMP schedulers.
2014-06-12score: Fix warningsSebastian Huber
2014-06-12score: FormatSebastian Huber
2014-06-12score: Add missing inlineSebastian Huber
2014-06-12score: Fix scheduler context initializerSebastian Huber
2014-06-11Add SMP Priority Scheduler with AffinityJoel Sherrill
This scheduler attempts to account for needed thread migrations caused as a side-effect of a thread state, affinity, or priority change operation. This scheduler has its own allocate_processor handler named _Scheduler_SMP_Allocate_processor_exact() because _Scheduler_SMP_Allocate_processor() attempts to prevent an executing thread from moving off its current CPU without considering affinity. Without this, the scheduler makes all the right decisions and then they are discarded at the end. ==Side Effects of Adding This Scheduler== Added Thread_Control * parameter to Scheduler_SMP_Get_highest_ready type so methods looking for the highest ready thread can filter by the processor on which the thread blocking resides. This allows affinity to be considered. Simple Priority SMP and Priority SMP ignore this parameter. + Added get_lowest_scheduled argument to _Scheduler_SMP_Enqueue_ordered(). + Added allocate_processor argument to the following methods: - _Scheduler_SMP_Block() - _Scheduler_SMP_Enqueue_scheduled_ordered() - _Scheduler_SMP_Enqueue_scheduled_ordered() + schedulerprioritysmpimpl.h is a new file with prototypes for methods which were formerly static in schedulerprioritysmp.c but now need to be public to be shared with this scheduler. NOTE: _Scheduler_SMP_Get_lowest_ready() appears to have a path which would allow it to return a NULL. Previously, _Scheduler_SMP_Enqueue_ordered() would have asserted on it. If it cannot return a NULL, _Scheduler_SMP_Get_lowest_ready() should have an assertions.
2014-06-11samples/pppd: Fix extra drivers initializerSebastian Huber
2014-06-10lm3s6965-testsuite.cfg: Add pppd.Martin Galvan
When trying to compile RTEMS for the Stellaris LM3S6965 board, I had an issue of pppd.exe's .rodata section being too big to fit in the board's memory image (region 'ROM_INT' overflowed).
2014-06-10score: Fix MrsP root node updateSebastian Huber
Set the new root after the resource tree update.
2014-06-10smptest/smpfatal03: Update due to API changesSebastian Huber
2014-06-10bsp/lpc176x: New BSPMartin Boretto
2014-06-06Revert "bsps/powerpc: Fix potential relocation truncation"Sebastian Huber
This reverts commit d9ff8b3e687a0ec56cac6463ba01ba7775eccd41. It is not that simple: https://sourceware.org/ml/binutils/2014-06/msg00062.html On Fri, Jun 06, 2014 at 01:31:48PM +0200, Sebastian Huber wrote: > On 2014-06-06 13:23, Sebastian Huber wrote: > >Ok, so this "cmplwi cr0, rX, ppc_exc_lock_std@sdarel" is illegal, > >since > >ppc_exc_lock_std@sdarel is signed and the immediate is unsigned > >16-bit? The > >assembler doesn't issue a warning about this. > > > >Exists there a way to rescue this cmplwi hack without relaxing the > >overflow > >checks? > > Hm, sorry, it was surprisingly simple. This works: > > "cmplwi cr0, rX, ppc_exc_lock_std@sdarel@l" > > I was not aware that you can add several @ in a row. That is the wrong thing to use here. sdarel@l translates to a VLE reloc which applies to a split 16-bit field in VLE insns. You want cmpwi cr0, rX, ppc_exc_lock_std@sdarel to properly compare a 16-bit signed number from sym@sdarel. Note that the assembler does error if you write something like cmplwi 3,-30000 or cmpwi 3,40000 so what the linker is now doing is extending this behaviour to link time.
2014-06-06bsps/powerpc: Fix potential relocation truncationSebastian Huber
See also https://sourceware.org/ml/binutils/2014-06/msg00059.html On Fri, Jun 06, 2014 at 11:01:10AM +0200, Sebastian Huber wrote: > I performed a git bisect and found this: > > 93d1b056cb396d6468781fe0e40dd769891bed32 is the first bad commit > commit 93d1b056cb396d6468781fe0e40dd769891bed32 > Author: Alan Modra <amodra@gmail.com> > Date: Tue May 20 11:42:42 2014 +0930 > > Rewrite ppc32 backend .sdata and .sdata2 handling Hmm, I'm surprised that your git bisect found this patch. Was _SDA_BASE_ set differently before this? > 0x00000000000dfc00 _SDA_BASE_ > 0x00000000000d7f78 ppc_exc_lock_std > 4b8: 28 05 00 00 cmplwi r5,0 > 4ba: R_PPC_SDAREL16 ppc_exc_lock_std ppc_exc_lock_std@sdarel will be calculating 0xd7f78 - 0xdfc00 which is 0xf...fff8378, and that falls foul of commit 86c9573369616e7437481b6e5533aef3a435cdcf Author: Alan Modra <amodra@gmail.com> Date: Sat Mar 8 13:05:06 2014 +1030 Better overflow checking for powerpc32 relocations cmplwi has an *unsigned* 16-bit field, and we now check the overflow properly. I wonder how many more of these we'll hit, and whether the uproar will be enough that I'll be forced to relax the checks?
2014-06-06bsps/arm: Fix TLB invalidation for ARMv7-ASebastian Huber
2014-06-06bsps/arm: Fix Cortex-A9 MPCore clock driverSebastian Huber
The nanoseconds extension returned wrong values on secondary processors since some of the global timer registeres are banked. Use global variables instead.
2014-06-06bsp/altera-cyclone-v: Enable unified L2 cacheSebastian Huber
2014-06-06bsp/altera-cyclone-v: Move SMP supportSebastian Huber
2014-06-06bsps/arm: Change L2 cache initializationSebastian Huber
Do not touch the L1 caches since they have been initialized by the start hooks.
2014-06-06bsp/altera-cyclone-v: Simplify start hooksSebastian Huber
Use arm_a9mpcore_start_hook_0(). The L2 cache is now disabled.
2014-06-06bsp/altera-cyclone-v: Change default baudSebastian Huber
Use value for standard U-Boot.
2014-06-06bsp/altera-cyclone-v: Use NOLOAD for nocache secSebastian Huber
2014-06-06bsp/altera-cyclone-v: Simplify MMU config tableSebastian Huber
2014-06-06bsps/arm: Define ARM_CP15_TEXT_SECTIONSebastian Huber
Define ARM_CP15_TEXT_SECTION to BSP_START_TEXT_SECTION so that the start code is in the right section.
2014-06-05bsps/arm: Add ARM_CP15_TEXT_SECTIONSebastian Huber
Allow users of this header file to optionally place the inline functions into a non-standard section.
2014-06-05bsps/arm: Simplify L1 caches supportSebastian Huber
Delete superfluous/incorrect interrupt disable/enable.
2014-06-05bsps/arm: Add all level data cache invalidationSebastian Huber
2014-06-05bsps/arm: TypoSebastian Huber
2014-06-05bsps/arm: Cortex-A9 MPCore startSebastian Huber
Invalidate entire branch predictor array.
2014-06-05bsps/arm: Cortex-A9 MPCore startSebastian Huber
Enable SCU only on the boot processor.
2014-06-05bsps/arm: Cortex-A9 MPCore startSebastian Huber
Add arm_a9mpcore_start_enable_smp_in_auxiliary_control().
2014-06-05bsps/arm: Simplify Cortex-A9 MPCore startSebastian Huber
Add arm_a9mpcore_start_on_secondary_processor(). Rely on error checks in _SMP_Start_multitasking_on_secondary_processor().