From 2053ce659489720a98ef33ced6b2e63721cbc3f4 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 5 Sep 2013 10:14:42 +0800 Subject: M32r support Signed-off-by: Peng Fan --- libbsd/include/arch/m32r/machine/ansi.h | 0 libbsd/include/arch/m32r/machine/asm.h | 2 + libbsd/include/arch/m32r/machine/cdefs.h | 0 libbsd/include/arch/m32r/machine/elf_machdep.h | 39 +++++++ libbsd/include/arch/m32r/machine/int_types.h | 0 rtl-mdreloc-m32r.c | 156 +++++++++++++++++++++++++ testcase/1.c | 29 +++++ testcase/Readme | 8 ++ testcase/wscript | 13 +++ wscript | 2 +- 10 files changed, 248 insertions(+), 1 deletion(-) create mode 100644 libbsd/include/arch/m32r/machine/ansi.h create mode 100644 libbsd/include/arch/m32r/machine/asm.h create mode 100644 libbsd/include/arch/m32r/machine/cdefs.h create mode 100644 libbsd/include/arch/m32r/machine/elf_machdep.h create mode 100644 libbsd/include/arch/m32r/machine/int_types.h create mode 100644 rtl-mdreloc-m32r.c diff --git a/libbsd/include/arch/m32r/machine/ansi.h b/libbsd/include/arch/m32r/machine/ansi.h new file mode 100644 index 0000000..e69de29 diff --git a/libbsd/include/arch/m32r/machine/asm.h b/libbsd/include/arch/m32r/machine/asm.h new file mode 100644 index 0000000..b3a7a95 --- /dev/null +++ b/libbsd/include/arch/m32r/machine/asm.h @@ -0,0 +1,2 @@ + +#define __CONCAT(x,y) x ## y diff --git a/libbsd/include/arch/m32r/machine/cdefs.h b/libbsd/include/arch/m32r/machine/cdefs.h new file mode 100644 index 0000000..e69de29 diff --git a/libbsd/include/arch/m32r/machine/elf_machdep.h b/libbsd/include/arch/m32r/machine/elf_machdep.h new file mode 100644 index 0000000..3f531cf --- /dev/null +++ b/libbsd/include/arch/m32r/machine/elf_machdep.h @@ -0,0 +1,39 @@ +#define ELF32_MACHDEP_ENDIANNESS ELFDATA2MSB + +#define ELF32_MACHDEP_ID_CASES \ + case EM_M32R: \ + break; + +#define ELF32_MACHDEP_ID EM_M32R + +#define ARCH_ELFSIZE 32 + +#define R_M32R_NONE 0 +/*-----------OLD TYPE-------------*/ +#define R_M32R_16 1 +#define R_M32R_32 2 +#define R_M32R_24 3 +#define R_M32R_10_PCREL 4 +#define R_M32R_18_PCREL 5 +#define R_M32R_26_PCREL 6 +#define R_M32R_HI16_ULO 7 +#define R_M32R_HI16_SLO 8 +#define R_M32R_LO16 9 +#define R_M32R_SDA16 10 +#define R_M32R_GNU_VTINHERIT 11 +#define R_M32R_GNU_VTENTRY 12 +/*--------------------------------*/ + +#define R_M32R_16_RELA 33 +#define R_M32R_32_RELA 34 +#define R_M32R_24_RELA 35 +#define R_M32R_18_PCREL_RELA 37 +#define R_M32R_26_PCREL_RELA 38 +#define R_M32R_HI16_ULO_RELA 39 +#define R_M32R_HI16_SLO_RELA 40 +#define R_M32R_LO16_RELA 41 +#define R_M32R_SDA16_RELA 42 +#define R_M32R_RELA_GNU_VTINHERIT 43 +#define R_M32R_RELA_GNU_VTENTRY 44 + +#define R_TYPE(name) __CONCAT(R_M32R_,name) diff --git a/libbsd/include/arch/m32r/machine/int_types.h b/libbsd/include/arch/m32r/machine/int_types.h new file mode 100644 index 0000000..e69de29 diff --git a/rtl-mdreloc-m32r.c b/rtl-mdreloc-m32r.c new file mode 100644 index 0000000..d8bd497 --- /dev/null +++ b/rtl-mdreloc-m32r.c @@ -0,0 +1,156 @@ +#include + +#include +#include +#include +#include + +#include +#include "rtl-elf.h" +#include "rtl-error.h" +#include + +static inline Elf_Addr +load_ptr(void *where) +{ + Elf_Addr res; + + memcpy(&res, where, sizeof(res)); + + return (res); +} + +static inline void +store_ptr(void *where, Elf_Addr val) +{ + memcpy(where, &val, sizeof(val)); +} + +bool +rtems_rtl_elf_rel_resolve_sym (Elf_Word type) +{ + return true; +} + +bool +rtems_rtl_elf_relocate_rela (const rtems_rtl_obj_t* obj, + const Elf_Rela* rela, + const rtems_rtl_obj_sect_t* sect, + const char* symname, + const Elf_Byte syminfo, + const Elf_Word symvalue) +{ + + Elf_Addr *where; + Elf_Word tmp; + + where = (Elf_Addr *)(sect->base + rela->r_offset); + if (rtems_rtl_trace (RTEMS_RTL_TRACE_RELOC)) { + printf("relocated address 0x%08lx\n", (Elf_Addr)where); + } + + switch (ELF_R_TYPE(rela->r_info)) { + case R_TYPE(NONE): + break; + + case R_TYPE(16_RELA): + /* + * half16: S + A + */ + *(uint16_t *)where = (symvalue + rela->r_addend) & 0xffff; + break; + + case R_TYPE(24_RELA): + /* + * imm24: (S + A) & 0xFFFFFF + */ + tmp = symvalue + rela->r_addend; + if (((Elf_Sword)tmp > 0x7fffff) || ((Elf_Sword)tmp < -0x800000)) { + printf("24_RELA Overflow\n"); + return false; + } + *where = (*where & 0xff000000) | tmp & 0xffffff; + break; + + case R_TYPE(32_RELA): + /* + * word32: S + A + */ + *where += symvalue + rela->r_addend; + break; + + case R_TYPE(26_PCREL_RELA): + /* + * disp24: ((S + A - P) >> 2) & 0xFFFFFF + */ + tmp = symvalue + rela->r_addend - (Elf_Addr)where; + tmp = (Elf_Sword)tmp >> 2; + if (((Elf_Sword)tmp > 0x7fffff) || ((Elf_Sword)tmp < -0x800000)) { + printf("26_PCREL_RELA Overflow\n"); + return false; + } + + *where = (*where & 0xff000000) | (tmp & 0xffffff); + break; + + case R_TYPE(18_PCREL_RELA): + /* + * disp16: ((S + A - P) >> 2) & 0xFFFFFF + */ + tmp = symvalue + rela->r_addend - (Elf_Addr)where; + tmp = (Elf_Sword)tmp >> 2; + if (((Elf_Sword)tmp > 0x7fff) || ((Elf_Sword)tmp < -0x8000)) { + printf("18_PCREL_RELA Overflow\n"); + return false; + } + + *where = (*where & 0xffff0000) | (tmp & 0xffff); + break; + + case R_TYPE(HI16_ULO_RELA): + /* + * imm16: ((S + A) >> 16) + */ + tmp = *where; + tmp += ((symvalue + rela->r_addend) >> 16) & 0xffff; + *where = tmp; + break; + + case R_TYPE(HI16_SLO_RELA): + /* + * imm16: ((S + A) >> 16) or ((S + A + 0x10000) >> 16) + */ + tmp = symvalue + rela->r_addend; + if (tmp & 0x8000) tmp += 0x10000; + tmp = (tmp >> 16) & 0xffff; + *where += tmp; + break; + + case R_TYPE(LO16_RELA): + /* + * imm16: (S + A) & 0xFFFF + */ + tmp = symvalue + rela->r_addend; + *where = (*where & 0xffff0000) | (tmp & 0xffff); + break; + + default: + rtems_rtl_set_error (EINVAL, "rela type record not supported"); + printf("Unsupported rela reloc types\n"); + return false; + } + return true; +} + +bool +rtems_rtl_elf_relocate_rel (const rtems_rtl_obj_t* obj, + const Elf_Rel* rel, + const rtems_rtl_obj_sect_t* sect, + const char* symname, + const Elf_Byte syminfo, + const Elf_Word symvalue) +{ + + rtems_rtl_set_error (EINVAL, "rel type record not supported"); + return true; +} diff --git a/testcase/1.c b/testcase/1.c index 18e643b..58903bc 100644 --- a/testcase/1.c +++ b/testcase/1.c @@ -42,6 +42,10 @@ void hello(int arg) printf("Just test 'beq hello, PCREL10', so just halt here\n"); while(1); break; +#elif defined (__m32r__) + case 18: + printf("beq r0, r4, hello, 18_PCREL_RELA pass\n"); + break; #else #endif @@ -277,6 +281,31 @@ int rtems(int argc, char **argv) "cmp $r0, $r1\n\t" "beq hello\n\t"); +#elif defined (__m32r__) +#if 1 + __asm__ volatile ( + "push r0\n\t" + "push r4\n\t" + "push r14\n\t" + "ld24 r14, 2f\n\t" + "ldi r0, #18\n\t" + "ldi r4, #18\n\t" + "beq r0, r4, hello\n\t" + "1:\n\t" + ".word global\n\t" + "2:\n\t" + "ld24 r0, 1b\n\t" + "ld r4, @r0\n\t" + "ldi r0, #22\n\t" + "st r0, @r4\n\t" + "pop r14\n\t" + "pop r4\n\t" + "pop r0\n\t" + ); + if (global == 22) + printf("R_M32R_32_RELA, .word global pass\n"); + +#endif #else /* other archs */ #endif diff --git a/testcase/Readme b/testcase/Readme index 364b163..5735dc2 100644 --- a/testcase/Readme +++ b/testcase/Readme @@ -51,3 +51,11 @@ v850: Simulator: v850sim-gdb build/v850-rtems4.11-v850sim/rtld + +m32r: + One can choose different cflags in wscript for m32r to see what happens. + + configure --rtems=/opt/rtems-4.11 --rtems-tools=/opt/rtems-4.11 --rtems-archs=m32r + + Simulator: + m32rsim-gdb build/m32r-rtems4.11-m32rsim/rtld diff --git a/testcase/wscript b/testcase/wscript index f38c124..cad0613 100644 --- a/testcase/wscript +++ b/testcase/wscript @@ -108,6 +108,19 @@ def build(bld): '--entry', '_my_main'], source = ['1.c', '2.c']) + elif arch == 'm32r': +# cflags = '-fno-common, -mmodel=large', +# cflags = '-fno-common -mmodel=medium', + bld(target = 'test.rap', + features = 'c rap', + xxxx = 'hello', + + cflags = '-fno-common', + + rtems_linkflags = ['--base', 'rtld.prelink', + '--entry', 'my_main'], + source = ['1.c', '2.c']) + bld(target = '../test.rap', source = ['test.rap'], rule = 'cp ${SRC} ${TGT}') diff --git a/wscript b/wscript index 5380b9a..41d1491 100644 --- a/wscript +++ b/wscript @@ -66,7 +66,7 @@ def build(bld): # # The ARM as special BSP initialise code. # - if arch == 'arm' or arch == 'powerpc' or arch == 'mips' or arch == 'bfin' or arch == 'h8300' or arch == 'lm32' or arch == 'moxie' or arch == 'v850': + if arch == 'arm' or arch == 'powerpc' or arch == 'mips' or arch == 'bfin' or arch == 'h8300' or arch == 'lm32' or arch == 'moxie' or arch == 'v850' or arch == 'm32r': bld(target = 'bspinit', features = 'c', includes = bld.includes, -- cgit v1.2.3