From d66c55efed6e5d86f175ff30ef593f82133be25d Mon Sep 17 00:00:00 2001 From: Chris Johns Date: Thu, 4 Jan 2018 09:03:44 +0100 Subject: FIXME Needs review and split up --- bsps/arm/include/libcpu/am335x.h | 7 +++++-- bsps/bfin/include/bf52x.h | 4 ++++ bsps/bfin/include/libcpu/coreTimerRegs.h | 5 +++++ bsps/bfin/include/libcpu/ebiuRegs.h | 8 ++++++++ bsps/bfin/include/libcpu/rtcRegs.h | 7 +++++++ bsps/bfin/include/libcpu/sicRegs.h | 8 ++++++++ bsps/include/bsp/gpio.h | 1 + bsps/m68k/include/mcf548x/mcf548x.h | 4 ++-- c/src/lib/libbsp/m68k/mvme167/network/network.c | 2 +- 9 files changed, 41 insertions(+), 5 deletions(-) diff --git a/bsps/arm/include/libcpu/am335x.h b/bsps/arm/include/libcpu/am335x.h index c29ae6c761..367e97cae9 100644 --- a/bsps/arm/include/libcpu/am335x.h +++ b/bsps/arm/include/libcpu/am335x.h @@ -16,6 +16,9 @@ * ones, and merge with some other header files. */ +#if !defined(_AM335X_H_) +#define _AM335X_H_ + /* Interrupt controller memory map */ #define OMAP3_DM37XX_INTR_BASE 0x48200000 /* INTCPS physical address */ @@ -485,7 +488,6 @@ #define AM335X_PWMSS_SYSCONFIG 0x4 #define AM335X_PWMSS_CLKCONFIG 0x8 #define AM335X_PWMSS_CLK_EN_ACK 0x100 -#define AM335X_PWMSS_CLKSTATUS 0xC #define AM335X_EPWM_TBCTL 0x0 #define AM335X_EPWM_TBSTS 0x2 #define AM335X_EPWM_TBPHSHR 0x4 @@ -536,7 +538,6 @@ #define AM335X_EPWM_TBCTL_CTRMODE (0x0003u) #define AM335X_EPWM_COUNTER_MODE_MASK AM335X_EPWM_TBCTL_CTRMODE #define AM335X_TBCTL_FREERUN (2 << 14) -#define AM335X_TBCTL_CTRMODE_UP (0x0000u) #define AM335X_TBCTL_CTRMODE_SHIFT (0x0000u) #define AM335X_EPWM_COUNT_UP (AM335X_TBCTL_CTRMODE_UP << \ AM335X_TBCTL_CTRMODE_SHIFT) @@ -699,3 +700,5 @@ #define AM335X_I2C_IRQSTATUS_RAW_BB (0x00001000u) #define AM335X_CM_PER_OCPWP_L3_CLKSTCTRL_CLKACTIVITY_OCPWP_L4_GCLK (0x00000020u) #define AM335X_I2C_INT_STOP_CONDITION AM335X_I2C_IRQSTATUS_BF + +#endif diff --git a/bsps/bfin/include/bf52x.h b/bsps/bfin/include/bf52x.h index 6c3d087c79..3fad6a7ae6 100644 --- a/bsps/bfin/include/bf52x.h +++ b/bsps/bfin/include/bf52x.h @@ -24,6 +24,10 @@ #ifndef _BF52X_H_ #define _BF52X_H_ +#undef TIMER_ENABLE +#undef TIMER_DISABLE +#undef TIMER_STATUS + /* register (or register block) addresses */ #define SIC_BASE_ADDRESS 0xffc00100 diff --git a/bsps/bfin/include/libcpu/coreTimerRegs.h b/bsps/bfin/include/libcpu/coreTimerRegs.h index c5b257783c..6ad03c6da3 100644 --- a/bsps/bfin/include/libcpu/coreTimerRegs.h +++ b/bsps/bfin/include/libcpu/coreTimerRegs.h @@ -11,6 +11,11 @@ #ifndef _coreTimerRegs_h_ #define _coreTimerRegs_h_ +#undef TCNTL +#undef TPERIOD +#undef TSCALE +#undef TCOUNT + /* register addresses */ #define TCNTL 0xffe03000 diff --git a/bsps/bfin/include/libcpu/ebiuRegs.h b/bsps/bfin/include/libcpu/ebiuRegs.h index 1a07ff6985..9b68adf061 100644 --- a/bsps/bfin/include/libcpu/ebiuRegs.h +++ b/bsps/bfin/include/libcpu/ebiuRegs.h @@ -11,6 +11,14 @@ #ifndef _ebiuRegs_h_ #define _ebiuRegs_h_ +#undef EBIU_AMGCTL +#undef EBIU_AMBCTL0 +#undef EBIU_AMBCTL1 +#undef EBIU_SDGCTL +#undef EBIU_SDBCTL +#undef EBIU_SDRRC +#undef EBIU_SDSTAT + /* register addresses */ #define EBIU_AMGCTL (EBIU_BASE_ADDRESS + 0x0000) diff --git a/bsps/bfin/include/libcpu/rtcRegs.h b/bsps/bfin/include/libcpu/rtcRegs.h index 09245c2b91..2de302a1e0 100644 --- a/bsps/bfin/include/libcpu/rtcRegs.h +++ b/bsps/bfin/include/libcpu/rtcRegs.h @@ -11,6 +11,13 @@ #ifndef _rtcRegs_h_ #define _rtcRegs_h_ +#undef RTC_STAT +#undef RTC_ICTL +#undef RTC_ISTAT +#undef RTC_SWCNT +#undef RTC_ALARM +#undef RTC_PREN + /* register addresses */ #define RTC_STAT (RTC_BASE_ADDRESS + 0x0000) diff --git a/bsps/bfin/include/libcpu/sicRegs.h b/bsps/bfin/include/libcpu/sicRegs.h index 79fdd0d77c..905150f12d 100644 --- a/bsps/bfin/include/libcpu/sicRegs.h +++ b/bsps/bfin/include/libcpu/sicRegs.h @@ -11,6 +11,14 @@ #ifndef _sicRegs_h_ #define _sicRegs_h_ +#undef SIC_IMASK +#undef SIC_ISR +#undef SIC_IAR0 +#undef SIC_IAR1 +#undef SIC_IAR2 +#undef SIC_IAR3 +#undef SIC_IWR + /* register addresses */ #define SIC_IMASK (SIC_BASE_ADDRESS + 0x000c) diff --git a/bsps/include/bsp/gpio.h b/bsps/include/bsp/gpio.h index 7d8f67b171..64a877ae7a 100644 --- a/bsps/include/bsp/gpio.h +++ b/bsps/include/bsp/gpio.h @@ -42,6 +42,7 @@ extern "C" { #define GPIO_BANK_COUNT (BSP_GPIO_PIN_COUNT / BSP_GPIO_PINS_PER_BANK) + 1 #else #define GPIO_BANK_COUNT BSP_GPIO_PIN_COUNT / BSP_GPIO_PINS_PER_BANK + #undef GPIO_LAST_BANK_PINS #define GPIO_LAST_BANK_PINS BSP_GPIO_PINS_PER_BANK #endif diff --git a/bsps/m68k/include/mcf548x/mcf548x.h b/bsps/m68k/include/mcf548x/mcf548x.h index 440f6a74bb..a5386d0ec9 100644 --- a/bsps/m68k/include/mcf548x/mcf548x.h +++ b/bsps/m68k/include/mcf548x/mcf548x.h @@ -71,10 +71,10 @@ extern char __MBAR[]; #define MCF548X_CACR_BCINVA (0x00040000) #define MCF548X_CACR_IEC (0x00008000) #define MCF548X_CACR_DNFB (0x00002000) -#define MCF548X_CACR_ÍDPI (0x00001000) +#define MCF548X_CACR_DPI (0x00001000) #define MCF548X_CACR_IEC (0x00008000) #define MCF548X_CACR_DNFB (0x00002000) -#define MCF548X_CACR_ÍDPI (0x00001000) +#define MCF548X_CACR_XDPI (0x00001000) /* no idea what this value is */ #define MCF548X_CACR_IHLCK (0x00000800) #define MCF548X_CACR_IDCM (0x00000400) #define MCF548X_CACR_ICINVA (0x00000100) diff --git a/c/src/lib/libbsp/m68k/mvme167/network/network.c b/c/src/lib/libbsp/m68k/mvme167/network/network.c index 146035e2a9..059348804d 100644 --- a/c/src/lib/libbsp/m68k/mvme167/network/network.c +++ b/c/src/lib/libbsp/m68k/mvme167/network/network.c @@ -1002,7 +1002,7 @@ void uti596_initMem( uti596_initTBD( sc ); /* Padding used to fill short tx frames */ - memset ( &sc->zeroes, 0, 64); + memset ( (void*) &sc->zeroes, 0, 64); /* now need ISR */ sc->resetDone = 1; -- cgit v1.2.3